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[0/7] clk: renesas: rcar-gen3: Add support for CPU core clock boost modes

Message ID 20210326120100.1577596-1-geert+renesas@glider.be (mailing list archive)
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Series clk: renesas: rcar-gen3: Add support for CPU core clock boost modes | expand

Message

Geert Uytterhoeven March 26, 2021, noon UTC
Hi Mike, Stephen,

This patch series improves the accuracy of the CPU clock rate on R-Car
Gen3 SoCs, and adds support for CPU boost modes (marked "turbo-mode" in
the operating points table in DT).
As usual, it is preceded by a few small cleanups.

The easiest way to test this is by enabling
CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE, and writing the requested clock
rate to /sys/devices/system/cpu/cpufreq/policy$n/scaling_setspeed
(n=0 for the first cluster, n=2 or 4 for the second cluster).
Note that you need to do

    echo 1 > /sys/devices/system/cpu/cpufreq/boost

before you can enable boost modes.

The PLL rates and CPU clock rates and voltages can be monitored in
/sys/kernel/debug/{clk/{z,z2,.pll[024]}/clk_rate,reg*/dvfs/cpu*/*uV}.
The DVFS voltage measured by the on-board max9611 can be monitored
remotely using iio-monitor.

This series has been tested on Salvator-(X)S (with R-Car H3 ES1.0, H3
ES2.0, M3-W, and M3-N) and Ebisu-4D (R-Car E3).

As boost modes may be unstable without increasing the CPU core voltage,
this series depends on "[PATCH 0/2] arm64: dts: renesas: Add cpu-supply
properties for DVFS"[1].  Hence I think it is better to postpone this to
v5.14.

Thanks for your comments!

[1] https://lore.kernel.org/r/20210326105009.1574424-1-geert+renesas@glider.be

Geert Uytterhoeven (7):
  clk: renesas: rcar-gen3: Update Z clock rate formula in comments
  clk: renesas: rcar-gen3: Make cpg_z_clk.mask u32
  clk: renesas: rcar-gen3: Remove superfluous masking in
    cpg_z_clk_set_rate()
  clk: renesas: rcar-gen3: Grammar s/dependent of/dependent on/
  clk: renesas: rcar-gen3: Increase Z clock accuracy
  clk: renesas: rcar-gen3: Add custom clock for PLLs
  clk: renesas: rcar-gen3: Add boost support to Z clocks

 drivers/clk/renesas/rcar-gen3-cpg.c | 183 +++++++++++++++++++++++-----
 1 file changed, 154 insertions(+), 29 deletions(-)

Comments

Stephen Boyd March 30, 2021, 2:21 a.m. UTC | #1
Quoting Geert Uytterhoeven (2021-03-26 05:00:53)
>         Hi Mike, Stephen,
> 
> This patch series improves the accuracy of the CPU clock rate on R-Car
> Gen3 SoCs, and adds support for CPU boost modes (marked "turbo-mode" in
> the operating points table in DT).
> As usual, it is preceded by a few small cleanups.
> 
> The easiest way to test this is by enabling
> CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE, and writing the requested clock
> rate to /sys/devices/system/cpu/cpufreq/policy$n/scaling_setspeed
> (n=0 for the first cluster, n=2 or 4 for the second cluster).
> Note that you need to do
> 
>     echo 1 > /sys/devices/system/cpu/cpufreq/boost
> 
> before you can enable boost modes.
> 
> The PLL rates and CPU clock rates and voltages can be monitored in
> /sys/kernel/debug/{clk/{z,z2,.pll[024]}/clk_rate,reg*/dvfs/cpu*/*uV}.
> The DVFS voltage measured by the on-board max9611 can be monitored
> remotely using iio-monitor.
> 
> This series has been tested on Salvator-(X)S (with R-Car H3 ES1.0, H3
> ES2.0, M3-W, and M3-N) and Ebisu-4D (R-Car E3).
> 
> As boost modes may be unstable without increasing the CPU core voltage,
> this series depends on "[PATCH 0/2] arm64: dts: renesas: Add cpu-supply
> properties for DVFS"[1].  Hence I think it is better to postpone this to
> v5.14.
> 
> Thanks for your comments!
> 

Acked-by: Stephen Boyd <sboyd@kernel.org>
Yoshihiro Shimoda March 30, 2021, 10:05 a.m. UTC | #2
Hi Geert-san,

> From: Geert Uytterhoeven, Sent: Friday, March 26, 2021 9:01 PM
> 
> 	Hi Mike, Stephen,
> 
> This patch series improves the accuracy of the CPU clock rate on R-Car
> Gen3 SoCs, and adds support for CPU boost modes (marked "turbo-mode" in
> the operating points table in DT).
> As usual, it is preceded by a few small cleanups.
> 
> The easiest way to test this is by enabling
> CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE, and writing the requested clock
> rate to /sys/devices/system/cpu/cpufreq/policy$n/scaling_setspeed
> (n=0 for the first cluster, n=2 or 4 for the second cluster).
> Note that you need to do
> 
>     echo 1 > /sys/devices/system/cpu/cpufreq/boost
> 
> before you can enable boost modes.
> 
> The PLL rates and CPU clock rates and voltages can be monitored in
> /sys/kernel/debug/{clk/{z,z2,.pll[024]}/clk_rate,reg*/dvfs/cpu*/*uV}.
> The DVFS voltage measured by the on-board max9611 can be monitored
> remotely using iio-monitor.
> 
> This series has been tested on Salvator-(X)S (with R-Car H3 ES1.0, H3
> ES2.0, M3-W, and M3-N) and Ebisu-4D (R-Car E3).

Thank you for the patch!

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

And, I tested on R-Car H3 ES3.0 and it worked. So,

Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
# I'm not sure adding Tested-by tag is suitable for patch 1 and 4 though...

> As boost modes may be unstable without increasing the CPU core voltage,
> this series depends on "[PATCH 0/2] arm64: dts: renesas: Add cpu-supply
> properties for DVFS"[1].  Hence I think it is better to postpone this to
> v5.14.

I think so.

Best regards,
Yoshihiro Shimoda