| Message ID | 20210326120100.1577596-3-geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | clk: renesas: rcar-gen3: Add support for CPU core clock boost modes | expand |
diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c index 5edc85ab04b4430f..e5edf1b908411643 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.c +++ b/drivers/clk/renesas/rcar-gen3-cpg.c @@ -50,8 +50,8 @@ struct cpg_z_clk { struct clk_hw hw; void __iomem *reg; void __iomem *kick_reg; - unsigned long mask; unsigned int fixed_div; + u32 mask; }; #define to_z_clk(_hw) container_of(_hw, struct cpg_z_clk, hw)
cpg_z_clk.mask contains a mask for a 32-bit register. Hence its size can be reduced from unsigned long to u32. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- drivers/clk/renesas/rcar-gen3-cpg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)