Show patches with: Series = clk: renesas: Add GE3D clock/reset entries for RZ/V2H(P) SoC       |    State = Action Required       |    Archived = No       |   5 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v2,5/5] clk: renesas: r9a09g057: Add clock and reset entries for GE3D clk: renesas: Add GE3D clock/reset entries for RZ/V2H(P) SoC - - - --- 2025-03-09 Lad, Prabhakar geert New
[v2,4/5] clk: renesas: rzv2h: Rename PLL field macros for consistency clk: renesas: Add GE3D clock/reset entries for RZ/V2H(P) SoC - - - --- 2025-03-09 Lad, Prabhakar geert New
[v2,3/5] clk: renesas: rzv2h-cpg: Add support for enabling PLLs clk: renesas: Add GE3D clock/reset entries for RZ/V2H(P) SoC - - - --- 2025-03-09 Lad, Prabhakar geert New
[v2,2/5] clk: renesas: rzv2h: Remove unused `type` field from `struct pll_clk` clk: renesas: Add GE3D clock/reset entries for RZ/V2H(P) SoC - - - --- 2025-03-09 Lad, Prabhakar geert New
[v2,1/5] clk: renesas: rzv2h: Refactor PLL configuration handling clk: renesas: Add GE3D clock/reset entries for RZ/V2H(P) SoC - - - --- 2025-03-09 Lad, Prabhakar geert New