| Message ID | 071ec644de2555da593a4531ef5d3e4d79cf997d.1625064076.git.geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | pinctrl: renesas: Add r8a77995 bias pinconf support | expand |
Hi Geert, On 2021-06-30 16:50:42 +0200, Geert Uytterhoeven wrote: > When disabling pin bias, there is no need to touch the LSI pin > pull-up/down control register (PUDn), which selects between pull-up and > pull-down. Just disabling the pull-up/down function through the LSI pin > pull-enable register (PUENn) us sufficient. s/us/is/ > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > v2: > - New. > --- > drivers/pinctrl/renesas/pinctrl.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/drivers/pinctrl/renesas/pinctrl.c b/drivers/pinctrl/renesas/pinctrl.c > index bb488af298623407..85cb78cfcfa6c37d 100644 > --- a/drivers/pinctrl/renesas/pinctrl.c > +++ b/drivers/pinctrl/renesas/pinctrl.c > @@ -898,17 +898,17 @@ void rcar_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, > > if (reg->puen) { > enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit); > - if (bias != PIN_CONFIG_BIAS_DISABLE) > + if (bias != PIN_CONFIG_BIAS_DISABLE) { > enable |= BIT(bit); > > - if (reg->pud) { > - updown = sh_pfc_read(pfc, reg->pud) & ~BIT(bit); > - if (bias == PIN_CONFIG_BIAS_PULL_UP) > - updown |= BIT(bit); > + if (reg->pud) { > + updown = sh_pfc_read(pfc, reg->pud) & ~BIT(bit); > + if (bias == PIN_CONFIG_BIAS_PULL_UP) > + updown |= BIT(bit); > > - sh_pfc_write(pfc, reg->pud, updown); > + sh_pfc_write(pfc, reg->pud, updown); > + } > } > - > sh_pfc_write(pfc, reg->puen, enable); > } else { > enable = sh_pfc_read(pfc, reg->pud) & ~BIT(bit); > -- > 2.25.1 >
diff --git a/drivers/pinctrl/renesas/pinctrl.c b/drivers/pinctrl/renesas/pinctrl.c index bb488af298623407..85cb78cfcfa6c37d 100644 --- a/drivers/pinctrl/renesas/pinctrl.c +++ b/drivers/pinctrl/renesas/pinctrl.c @@ -898,17 +898,17 @@ void rcar_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, if (reg->puen) { enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit); - if (bias != PIN_CONFIG_BIAS_DISABLE) + if (bias != PIN_CONFIG_BIAS_DISABLE) { enable |= BIT(bit); - if (reg->pud) { - updown = sh_pfc_read(pfc, reg->pud) & ~BIT(bit); - if (bias == PIN_CONFIG_BIAS_PULL_UP) - updown |= BIT(bit); + if (reg->pud) { + updown = sh_pfc_read(pfc, reg->pud) & ~BIT(bit); + if (bias == PIN_CONFIG_BIAS_PULL_UP) + updown |= BIT(bit); - sh_pfc_write(pfc, reg->pud, updown); + sh_pfc_write(pfc, reg->pud, updown); + } } - sh_pfc_write(pfc, reg->puen, enable); } else { enable = sh_pfc_read(pfc, reg->pud) & ~BIT(bit);
When disabling pin bias, there is no need to touch the LSI pin pull-up/down control register (PUDn), which selects between pull-up and pull-down. Just disabling the pull-up/down function through the LSI pin pull-enable register (PUENn) us sufficient. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v2: - New. --- drivers/pinctrl/renesas/pinctrl.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)