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[3/8,RFC] arm64: dts: renesas: Add R-Car M3-W SiP (2 x 1 GiB) support

Message ID 1492593351-13835-4-git-send-email-geert+renesas@glider.be (mailing list archive)
State RFC
Delegated to: Simon Horman
Headers show

Commit Message

Geert Uytterhoeven April 19, 2017, 9:15 a.m. UTC
Add support for the R-Car M3-W System-in-Package (r8j7796), which contains:
  - an R-Car M3-W SoC (r8a7796),
  - 2 channels of 1 GiB of RAM (2 GiB total),
  - HyperFlash (not yet described).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Questions:
  - Should this file be named r8j7796-2g.dtsi instead?
  - What's the official name of r8j7796 with 2 x 1 GiB of RAM?
---
 arch/arm64/boot/dts/renesas/r8j7796-2x1g.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r8j7796-2x1g.dtsi
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Patch

diff --git a/arch/arm64/boot/dts/renesas/r8j7796-2x1g.dtsi b/arch/arm64/boot/dts/renesas/r8j7796-2x1g.dtsi
new file mode 100644
index 0000000000000000..ba274c132e6dd984
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8j7796-2x1g.dtsi
@@ -0,0 +1,26 @@ 
+/*
+ * Device Tree Source for the r8a7796 SiP with 2 channels of 1 GiB RAM
+ *
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include "r8a7796.dtsi"
+
+/ {
+	compatible = "renesas,r8j7796", "renesas,r8a7796";
+
+	memory@48000000 {
+		device_type = "memory";
+		/* first 128MB is reserved for secure area. */
+		reg = <0x0 0x48000000 0x0 0x38000000>;
+	};
+
+	memory@600000000 {
+		device_type = "memory";
+		reg = <0x6 0x00000000 0x0 0x40000000>;
+	};
+};