| Message ID | 1535037134-373-3-git-send-email-jacopo+renesas@jmondi.org (mailing list archive) |
|---|---|
| State | Under Review |
| Delegated to: | Kieran Bingham |
| Headers | show |
| Series | drm: rcar-du: Update to SoC manual revision 1.00 | expand |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index 7b1c05b..9ba5551 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -315,7 +315,10 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) params.escr); } - rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? OTAR13 : OTAR02, 0); + if (rcrtc->index & + rcdu->info->routes[RCAR_DU_OUTPUT_DPAD0].possible_crtcs) + rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? OTAR13 : OTAR02, + 0); /* Signal polarities */ dsmr = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? DSMR_VSL : 0)
According to revision 1.00 of R-Car Gen3 SoC manual, writing to OTAR register is valid only if the channel is equipped with a digital output pad (DPAD). Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> --- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)