| Message ID | 1543319795-48325-12-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Simon Horman |
| Headers | show |
| Series | Add more support to RZ/G1N | expand |
On Tue, Nov 27, 2018 at 11:56:24AM +0000, Biju Das wrote: > Add du node to r8a7744 SoC DT. Boards that want to enable the DU > need to specify the output topology. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> Thanks, This looks fine to me but I will wait to see if there are other reviews before applying. Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Hi Biju, On Tue, Nov 27, 2018 at 1:05 PM Biju Das <biju.das@bp.renesas.com> wrote: > Add du node to r8a7744 SoC DT. Boards that want to enable the DU > need to specify the output topology. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> Thanks for your patch! > --- a/arch/arm/boot/dts/r8a7744.dtsi > +++ b/arch/arm/boot/dts/r8a7744.dtsi > @@ -1300,8 +1300,17 @@ > }; > > du: display@feb00000 { > + compatible = "renesas,du-r8a7744"; > reg = <0 0xfeb00000 0 0x40000>, > <0 0xfeb90000 0 0x1c>; > + reg-names = "du", "lvds.0"; Please use the new DU/LVDS bindings, using a separate node for LVDS. BTW, I believe the display won't work with a recent tree, unless you've added a DT live patch drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7744.dts? The same is true for RZ/G1M. > + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 724>, > + <&cpg CPG_MOD 723>, > + <&cpg CPG_MOD 726>; > + clock-names = "du.0", "du.1", "lvds.0"; > + status = "disabled"; > > ports { > #address-cells = <1>; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert, Thanks for the feedback. > Subject: Re: [PATCH 11/22] ARM: dts: r8a7744: Add DU support > > Hi Biju, > > On Tue, Nov 27, 2018 at 1:05 PM Biju Das <biju.das@bp.renesas.com> wrote: > > Add du node to r8a7744 SoC DT. Boards that want to enable the DU need > > to specify the output topology. > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > Thanks for your patch! > > > --- a/arch/arm/boot/dts/r8a7744.dtsi > > +++ b/arch/arm/boot/dts/r8a7744.dtsi > > @@ -1300,8 +1300,17 @@ > > }; > > > > du: display@feb00000 { > > + compatible = "renesas,du-r8a7744"; > > reg = <0 0xfeb00000 0 0x40000>, > > <0 0xfeb90000 0 0x1c>; > > + reg-names = "du", "lvds.0"; > > Please use the new DU/LVDS bindings, using a separate node for LVDS. > > BTW, I believe the display won't work with a recent tree, unless you've > added a DT live patch drivers/gpu/drm/rcar- > du/rcar_du_of_lvds_r8a7744.dts? > > The same is true for RZ/G1M. So far we haven't enabled LVDS panel on board specific dtsi. I have tested du with below renesas-dev kernel version Linux version 4.20.0-rc4-00127-g5ad8ac8 (biju@be1yocto) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #56 SMP Fri Nov 30 08:03:21 GMT 2018 [ 1.942603] [drm] Device feb00000.display probed root@iwg20m:~# modetest -M rcar-du Encoders: id crtc type possible crtcs possible clones 54 52 none 0x00000003 0x00000001 Connectors: id encoder status name size (mm) modes encoders 55 54 connected HDMI-A-1 520x320 27 54 modes: name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot) 1920x1080 60 1920 1968 2000 2080 1080 1082 1087 1111 138000 flags: phsync, nvsync; type: preferred, driver 1920x1080 60 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver 1920x1080 60 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver 1280x1024 75 1280 1296 1440 1688 1024 1025 1028 1066 135000 flags: phsync, pvsync; type: driver 1280x1024 60 1280 1328 1440 1688 1024 1025 1028 1066 108000 flags: phsync, pvsync; type: driver 1152x864 75 1152 1216 1344 1600 864 865 868 900 108000 flags: phsync, pvsync; type: driver 1280x720 60 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver 1280x720 60 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver 1280x720 50 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver 1024x768 75 1024 1040 1136 1312 768 769 772 800 78750 flags: phsync, pvsync; type: driver 1024x768 70 1024 1048 1184 1328 768 771 777 806 75000 flags: nhsync, nvsync; type: driver 1024x768 60 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver 1080x607 60 1080 1120 1232 1384 607 608 611 629 52210 flags: nhsync, pvsync; type: 832x624 75 832 864 928 1152 624 625 628 667 57284 flags: nhsync, nvsync; type: driver 800x600 75 800 816 896 1056 600 601 604 625 49500 flags: phsync, pvsync; type: driver 800x600 72 800 856 976 1040 600 637 643 666 50000 flags: phsync, pvsync; type: driver 800x600 60 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver 800x600 56 800 824 896 1024 600 601 603 625 36000 flags: phsync, pvsync; type: driver 720x576 50 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver 720x480 60 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver 720x480 60 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver 640x480 75 640 656 720 840 480 481 484 500 31500 flags: nhsync, nvsync; type: driver 640x480 73 640 664 704 832 480 489 492 520 31500 flags: nhsync, nvsync; type: driver 640x480 67 640 704 768 864 480 483 486 525 30240 flags: nhsync, nvsync; type: driver 640x480 60 640 656 752 800 480 490 492 525 25200 flags: nhsync, nvsync; type: driver 640x480 60 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver 720x400 70 720 738 846 900 400 412 414 449 28320 flags: nhsync, pvsync; type: driver Also tested libdrm/kms tests. It works fine with 4.20.0-rc4 kernel on renesas-dev branch. Regards, Biju Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi index d902f76..9c2e8ea 100644 --- a/arch/arm/boot/dts/r8a7744.dtsi +++ b/arch/arm/boot/dts/r8a7744.dtsi @@ -1300,8 +1300,17 @@ }; du: display@feb00000 { + compatible = "renesas,du-r8a7744"; reg = <0 0xfeb00000 0 0x40000>, <0 0xfeb90000 0 0x1c>; + reg-names = "du", "lvds.0"; + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 726>; + clock-names = "du.0", "du.1", "lvds.0"; + status = "disabled"; ports { #address-cells = <1>; @@ -1318,7 +1327,6 @@ }; }; }; - /* placeholder */ }; prr: chipid@ff000044 {
Add du node to r8a7744 SoC DT. Boards that want to enable the DU need to specify the output topology. Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- arch/arm/boot/dts/r8a7744.dtsi | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)