[v3,4/4] arm64: dts: renesas: r8a77995: draak: Enable HDMI display output

Commit Message

Laurent Pinchart Sept. 25, 2018, 4:33 p.m. UTC

From: Ulrich Hecht <[e-mail]>

Adds LVDS decoder, HDMI encoder and connector for the Draak board.

The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
EXTAL externals clocks. Two of them are provided to the SoC on the Draak
board, hook them up in DT.

Signed-off-by: Ulrich Hecht <[e-mail]>
Signed-off-by: Laurent Pinchart <[e-mail]>
Tested-by: Jacopo Mondi <[e-mail]>
---
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 98 +++++++++++++++++++++++++-
 1 file changed, 97 insertions(+), 1 deletion(-)

Comments

Geert Uytterhoeven June 18, 2021, 8:05 a.m. UTC | #1

Hi Laurent, Ulrich,

On Tue, Sep 25, 2018 at 6:34 PM Laurent Pinchart
<[e-mail]> wrote:
> From: Ulrich Hecht <[e-mail]>
>
> Adds LVDS decoder, HDMI encoder and connector for the Draak board.
>
> The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
> EXTAL externals clocks. Two of them are provided to the SoC on the Draak
> board, hook them up in DT.
>
> Signed-off-by: Ulrich Hecht <[e-mail]>
> Signed-off-by: Laurent Pinchart <[e-mail]>
> Tested-by: Jacopo Mondi <[e-mail]>

> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts

> @@ -190,6 +225,43 @@
>
>         };
>
> +       hdmi-encoder@39 {
> +               compatible = "adi,adv7511w";
> +               reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
> +               reg-names = "main", "edid", "packet", "cec";
> +               interrupt-parent = <&gpio1>;
> +               interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
> +
> +               /* Depends on LVDS */
> +               max-clock = <135000000>;
> +               min-vrefresh = <50>;

Where do these two come from? They fail to validate with commit
cfe34bb7a770c5d8 ("dt-bindings: drm: bridge: adi,adv7511.txt: convert
to yaml").
I can't find where it is used in the driver, nor in the driver history.
Perhaps it was set in some obscure place, and is no longer needed since
commit 67793bd3b3948dc8 ("drm/bridge: adv7511: Fix low refresh rate
selection")?

> +
> +               adi,input-depth = <8>;
> +               adi,input-colorspace = "rgb";
> +               adi,input-clock = "1x";
> +               adi,input-style = <1>;
> +               adi,input-justification = "evenly";

Gr{oetje,eeting}s,

                        Geert

Ulrich Hecht June 18, 2021, 12:01 p.m. UTC | #2

> On 06/18/2021 10:05 AM Geert Uytterhoeven <[e-mail]> wrote:
> On Tue, Sep 25, 2018 at 6:34 PM Laurent Pinchart
> <[e-mail]> wrote:
> > From: Ulrich Hecht <[e-mail]>
> >
> > Adds LVDS decoder, HDMI encoder and connector for the Draak board.
> >
> > The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
> > EXTAL externals clocks. Two of them are provided to the SoC on the Draak
> > board, hook them up in DT.
> >
> > Signed-off-by: Ulrich Hecht <[e-mail]>
> > Signed-off-by: Laurent Pinchart <[e-mail]>
> > Tested-by: Jacopo Mondi <[e-mail]>
> 
> > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> 
> > @@ -190,6 +225,43 @@
> >
> >         };
> >
> > +       hdmi-encoder@39 {
> > +               compatible = "adi,adv7511w";
> > +               reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
> > +               reg-names = "main", "edid", "packet", "cec";
> > +               interrupt-parent = <&gpio1>;
> > +               interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
> > +
> > +               /* Depends on LVDS */
> > +               max-clock = <135000000>;
> > +               min-vrefresh = <50>;
> 
> Where do these two come from? They fail to validate with commit
> cfe34bb7a770c5d8 ("dt-bindings: drm: bridge: adi,adv7511.txt: convert
> to yaml").
> I can't find where it is used in the driver, nor in the driver history.

I have found a prototype patch in my archives that uses these properties. I guess the patch itself didn't make it into the final series, but the properties inadvertently did. I vaguely remember this was supposed to work around an issue with modes that use a higher clock than supported by one of the parts in the display pipeline.

I would say that if there are no issues with HDMI output, both the patch and the properties are obsolete.

For reference, this is the patch:

===snip===
From 8502e09a87a02216a195a985243e3e6567848154 Mon Sep 17 00:00:00 2001
From: Koji Matsuoka <[e-mail]>
Date: Thu, 7 Dec 2017 20:10:39 +0900
Subject: [PROTO][PATCH 05/10] drm/bridge: adv7511: Add max-clock, min-vrefresh
 options

This patch adds the option to specify a maximal clock and a minimal vertical
refresh rate.

Signed-off-by: Koji Matsuoka <[e-mail]>
[uli: renamed properties, fixed transposed parsing]
Signed-off-by: Ulrich Hecht <[e-mail]>
---
 drivers/gpu/drm/bridge/adv7511/adv7511.h     |  7 +++++++
 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 22 ++++++++++++++++++++++
 2 files changed, 29 insertions(+)

diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bridge/adv7511/adv7511.h
index 73d8ccb..7f29d4f 100644
--- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
+++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
@@ -271,6 +271,8 @@ enum adv7511_sync_polarity {
  * @sync_pulse:			Select the sync pulse
  * @vsync_polarity:		vsync input signal configuration
  * @hsync_polarity:		hsync input signal configuration
+ * @min_vrefresh_option:	min vrefresh option
+ * @max_freq_option:		max frequency option
  */
 struct adv7511_link_config {
 	unsigned int input_color_depth;
@@ -285,6 +287,9 @@ struct adv7511_link_config {
 	enum adv7511_input_sync_pulse sync_pulse;
 	enum adv7511_sync_polarity vsync_polarity;
 	enum adv7511_sync_polarity hsync_polarity;
+
+	unsigned int min_vrefresh_option;
+	unsigned int max_freq_option;
 };
 
 /**
@@ -354,6 +359,8 @@ struct adv7511 {
 	enum adv7511_sync_polarity vsync_polarity;
 	enum adv7511_sync_polarity hsync_polarity;
 	bool rgb;
+	unsigned int min_vref;
+	unsigned int max_freq;
 
 	struct gpio_desc *gpio_pd;
 
diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
index 6437b87..2938b02 100644
--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
@@ -323,6 +323,8 @@ static void adv7511_set_link_config(struct adv7511 *adv7511,
 	adv7511->hsync_polarity = config->hsync_polarity;
 	adv7511->vsync_polarity = config->vsync_polarity;
 	adv7511->rgb = config->input_colorspace == HDMI_COLORSPACE_RGB;
+	adv7511->min_vref = config->min_vrefresh_option;
+	adv7511->max_freq = config->max_freq_option;
 }
 
 static void __adv7511_power_on(struct adv7511 *adv7511)
@@ -660,6 +662,16 @@ static enum drm_mode_status adv7511_mode_valid(struct adv7511 *adv7511,
 	if (mode->clock > 165000)
 		return MODE_CLOCK_HIGH;
 
+	if (adv7511->max_freq) {
+		if (mode->clock > (adv7511->max_freq / 1000))
+			return MODE_CLOCK_HIGH;
+	}
+
+	if (adv7511->min_vref) {
+		if (drm_mode_vrefresh(mode) < adv7511->min_vref)
+			return MODE_BAD;
+	}
+
 	return MODE_OK;
 }
 
@@ -1074,6 +1086,16 @@ static int adv7511_parse_dt(struct device_node *np,
 	config->vsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;
 	config->hsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;
 
+	ret = of_property_read_u32(np, "max-clock",
+				   &config->max_freq_option);
+	if (ret < 0)
+		config->max_freq_option = 0;
+
+	ret = of_property_read_u32(np, "min-vrefresh",
+				   &config->min_vrefresh_option);
+	if (ret < 0)
+		config->min_vrefresh_option = 0;
+
 	return 0;
 }

Geert Uytterhoeven June 18, 2021, 12:07 p.m. UTC | #3

Hi Uli,

On Fri, Jun 18, 2021 at 2:01 PM Ulrich Hecht <[e-mail]> wrote:
> > On 06/18/2021 10:05 AM Geert Uytterhoeven <[e-mail]> wrote:
> > On Tue, Sep 25, 2018 at 6:34 PM Laurent Pinchart
> > <[e-mail]> wrote:
> > > From: Ulrich Hecht <[e-mail]>
> > >
> > > Adds LVDS decoder, HDMI encoder and connector for the Draak board.
> > >
> > > The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
> > > EXTAL externals clocks. Two of them are provided to the SoC on the Draak
> > > board, hook them up in DT.
> > >
> > > Signed-off-by: Ulrich Hecht <[e-mail]>
> > > Signed-off-by: Laurent Pinchart <[e-mail]>
> > > Tested-by: Jacopo Mondi <[e-mail]>
> >
> > > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> >
> > > @@ -190,6 +225,43 @@
> > >
> > >         };
> > >
> > > +       hdmi-encoder@39 {
> > > +               compatible = "adi,adv7511w";
> > > +               reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
> > > +               reg-names = "main", "edid", "packet", "cec";
> > > +               interrupt-parent = <&gpio1>;
> > > +               interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
> > > +
> > > +               /* Depends on LVDS */
> > > +               max-clock = <135000000>;
> > > +               min-vrefresh = <50>;
> >
> > Where do these two come from? They fail to validate with commit
> > cfe34bb7a770c5d8 ("dt-bindings: drm: bridge: adi,adv7511.txt: convert
> > to yaml").
> > I can't find where it is used in the driver, nor in the driver history.
>
> I have found a prototype patch in my archives that uses these properties. I guess the patch itself didn't make it into the final series, but the properties inadvertently did. I vaguely remember this was supposed to work around an issue with modes that use a higher clock than supported by one of the parts in the display pipeline.

Thanks, I already suspected something like that...

> I would say that if there are no issues with HDMI output, both the patch and the properties are obsolete.

Anyone with a Draak to verify?

Gr{oetje,eeting}s,

                        Geert

Laurent Pinchart June 18, 2021, 12:24 p.m. UTC | #4

Hello,

On Fri, Jun 18, 2021 at 02:07:48PM +0200, Geert Uytterhoeven wrote:
> On Fri, Jun 18, 2021 at 2:01 PM Ulrich Hecht wrote:
> > > On 06/18/2021 10:05 AM Geert Uytterhoeven wrote:
> > > On Tue, Sep 25, 2018 at 6:34 PM Laurent Pinchart
> > > <[e-mail]> wrote:
> > > > From: Ulrich Hecht <[e-mail]>
> > > >
> > > > Adds LVDS decoder, HDMI encoder and connector for the Draak board.
> > > >
> > > > The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
> > > > EXTAL externals clocks. Two of them are provided to the SoC on the Draak
> > > > board, hook them up in DT.
> > > >
> > > > Signed-off-by: Ulrich Hecht <[e-mail]>
> > > > Signed-off-by: Laurent Pinchart <[e-mail]>
> > > > Tested-by: Jacopo Mondi <[e-mail]>
> > >
> > > > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > >
> > > > @@ -190,6 +225,43 @@
> > > >
> > > >         };
> > > >
> > > > +       hdmi-encoder@39 {
> > > > +               compatible = "adi,adv7511w";
> > > > +               reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
> > > > +               reg-names = "main", "edid", "packet", "cec";
> > > > +               interrupt-parent = <&gpio1>;
> > > > +               interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
> > > > +
> > > > +               /* Depends on LVDS */
> > > > +               max-clock = <135000000>;
> > > > +               min-vrefresh = <50>;
> > >
> > > Where do these two come from? They fail to validate with commit
> > > cfe34bb7a770c5d8 ("dt-bindings: drm: bridge: adi,adv7511.txt: convert
> > > to yaml").
> > > I can't find where it is used in the driver, nor in the driver history.
> >
> > I have found a prototype patch in my archives that uses these
> > properties. I guess the patch itself didn't make it into the final
> > series, but the properties inadvertently did. I vaguely remember
> > this was supposed to work around an issue with modes that use a
> > higher clock than supported by one of the parts in the display
> > pipeline.
> 
> Thanks, I already suspected something like that...

Sounds like a BSP attempt to model limitations of the DU and/or the PCB
and implement them in the adv7511 driver. There's similar code in the
VGA encoder driver that really doesn't belong there.

> > I would say that if there are no issues with HDMI output, both the
> > patch and the properties are obsolete.
> 
> Anyone with a Draak to verify?

I don't carry Ulrich's patch in my branch, and last time I checked, HDMI
output was functional. Do you want me to retest ?

Geert Uytterhoeven June 18, 2021, 12:48 p.m. UTC | #5

Hi Laurent,

On Fri, Jun 18, 2021 at 2:24 PM Laurent Pinchart
<[e-mail]> wrote:
> On Fri, Jun 18, 2021 at 02:07:48PM +0200, Geert Uytterhoeven wrote:
> > On Fri, Jun 18, 2021 at 2:01 PM Ulrich Hecht wrote:
> > > > On 06/18/2021 10:05 AM Geert Uytterhoeven wrote:
> > > > On Tue, Sep 25, 2018 at 6:34 PM Laurent Pinchart
> > > > <[e-mail]> wrote:
> > > > > From: Ulrich Hecht <[e-mail]>
> > > > >
> > > > > Adds LVDS decoder, HDMI encoder and connector for the Draak board.
> > > > >
> > > > > The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
> > > > > EXTAL externals clocks. Two of them are provided to the SoC on the Draak
> > > > > board, hook them up in DT.
> > > > >
> > > > > Signed-off-by: Ulrich Hecht <[e-mail]>
> > > > > Signed-off-by: Laurent Pinchart <[e-mail]>
> > > > > Tested-by: Jacopo Mondi <[e-mail]>
> > > >
> > > > > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > >
> > > > > @@ -190,6 +225,43 @@
> > > > >
> > > > >         };
> > > > >
> > > > > +       hdmi-encoder@39 {
> > > > > +               compatible = "adi,adv7511w";
> > > > > +               reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
> > > > > +               reg-names = "main", "edid", "packet", "cec";
> > > > > +               interrupt-parent = <&gpio1>;
> > > > > +               interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
> > > > > +
> > > > > +               /* Depends on LVDS */
> > > > > +               max-clock = <135000000>;
> > > > > +               min-vrefresh = <50>;
> > > >
> > > > Where do these two come from? They fail to validate with commit
> > > > cfe34bb7a770c5d8 ("dt-bindings: drm: bridge: adi,adv7511.txt: convert
> > > > to yaml").
> > > > I can't find where it is used in the driver, nor in the driver history.
> > >
> > > I have found a prototype patch in my archives that uses these
> > > properties. I guess the patch itself didn't make it into the final
> > > series, but the properties inadvertently did. I vaguely remember
> > > this was supposed to work around an issue with modes that use a
> > > higher clock than supported by one of the parts in the display
> > > pipeline.
> >
> > Thanks, I already suspected something like that...
>
> Sounds like a BSP attempt to model limitations of the DU and/or the PCB
> and implement them in the adv7511 driver. There's similar code in the
> VGA encoder driver that really doesn't belong there.
>
> > > I would say that if there are no issues with HDMI output, both the
> > > patch and the properties are obsolete.
> >
> > Anyone with a Draak to verify?
>
> I don't carry Ulrich's patch in my branch, and last time I checked, HDMI
> output was functional. Do you want me to retest ?

I guess no re-testing is needed, and the properties can just be removed.

Gr{oetje,eeting}s,

                        Geert

Laurent Pinchart June 18, 2021, 12:51 p.m. UTC | #6

Hi Geert,

On Fri, Jun 18, 2021 at 02:48:18PM +0200, Geert Uytterhoeven wrote:
> On Fri, Jun 18, 2021 at 2:24 PM Laurent Pinchart wrote:
> > On Fri, Jun 18, 2021 at 02:07:48PM +0200, Geert Uytterhoeven wrote:
> > > On Fri, Jun 18, 2021 at 2:01 PM Ulrich Hecht wrote:
> > > > > On 06/18/2021 10:05 AM Geert Uytterhoeven wrote:
> > > > > On Tue, Sep 25, 2018 at 6:34 PM Laurent Pinchart wrote:
> > > > > > From: Ulrich Hecht <[e-mail]>
> > > > > >
> > > > > > Adds LVDS decoder, HDMI encoder and connector for the Draak board.
> > > > > >
> > > > > > The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
> > > > > > EXTAL externals clocks. Two of them are provided to the SoC on the Draak
> > > > > > board, hook them up in DT.
> > > > > >
> > > > > > Signed-off-by: Ulrich Hecht <[e-mail]>
> > > > > > Signed-off-by: Laurent Pinchart <[e-mail]>
> > > > > > Tested-by: Jacopo Mondi <[e-mail]>
> > > > >
> > > > > > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > > > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > >
> > > > > > @@ -190,6 +225,43 @@
> > > > > >
> > > > > >         };
> > > > > >
> > > > > > +       hdmi-encoder@39 {
> > > > > > +               compatible = "adi,adv7511w";
> > > > > > +               reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
> > > > > > +               reg-names = "main", "edid", "packet", "cec";
> > > > > > +               interrupt-parent = <&gpio1>;
> > > > > > +               interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
> > > > > > +
> > > > > > +               /* Depends on LVDS */
> > > > > > +               max-clock = <135000000>;
> > > > > > +               min-vrefresh = <50>;
> > > > >
> > > > > Where do these two come from? They fail to validate with commit
> > > > > cfe34bb7a770c5d8 ("dt-bindings: drm: bridge: adi,adv7511.txt: convert
> > > > > to yaml").
> > > > > I can't find where it is used in the driver, nor in the driver history.
> > > >
> > > > I have found a prototype patch in my archives that uses these
> > > > properties. I guess the patch itself didn't make it into the final
> > > > series, but the properties inadvertently did. I vaguely remember
> > > > this was supposed to work around an issue with modes that use a
> > > > higher clock than supported by one of the parts in the display
> > > > pipeline.
> > >
> > > Thanks, I already suspected something like that...
> >
> > Sounds like a BSP attempt to model limitations of the DU and/or the PCB
> > and implement them in the adv7511 driver. There's similar code in the
> > VGA encoder driver that really doesn't belong there.
> >
> > > > I would say that if there are no issues with HDMI output, both the
> > > > patch and the properties are obsolete.
> > >
> > > Anyone with a Draak to verify?
> >
> > I don't carry Ulrich's patch in my branch, and last time I checked, HDMI
> > output was functional. Do you want me to retest ?
> 
> I guess no re-testing is needed, and the properties can just be removed.

Acked-by: Laurent Pinchart <[e-mail]>

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index e39b73005381..2405eaad0296 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -2,7 +2,7 @@ 
 /*
  * Device Tree Source for the Draak board
  *
- * Copyright (C) 2016 Renesas Electronics Corp.
+ * Copyright (C) 2016-2018 Renesas Electronics Corp.
  * Copyright (C) 2017 Glider bvba
  */
 
@@ -45,6 +45,41 @@ 
 		};
 	};
 
+	hdmi-out {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_out: endpoint {
+				remote-endpoint = <&adv7511_out>;
+			};
+		};
+	};
+
+	lvds-decoder {
+		compatible = "thine,thc63lvd1024";
+		vcc-supply = <&reg_3p3v>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				thc63lvd1024_in: endpoint {
+					remote-endpoint = <&lvds0_out>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+				thc63lvd1024_out: endpoint {
+					remote-endpoint = <&adv7511_in>;
+				};
+			};
+		};
+	};
+
 	memory@48000000 {
 		device_type = "memory";
 		/* first 128MB is reserved for secure area. */
@@ -190,6 +225,43 @@ 
 
 	};
 
+	hdmi-encoder@39 {
+		compatible = "adi,adv7511w";
+		reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
+		reg-names = "main", "edid", "packet", "cec";
+		interrupt-parent = <&gpio1>;
+		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
+
+		/* Depends on LVDS */
+		max-clock = <135000000>;
+		min-vrefresh = <50>;
+
+		adi,input-depth = <8>;
+		adi,input-colorspace = "rgb";
+		adi,input-clock = "1x";
+		adi,input-style = <1>;
+		adi,input-justification = "evenly";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				adv7511_in: endpoint {
+					remote-endpoint = <&thc63lvd1024_out>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				adv7511_out: endpoint {
+					remote-endpoint = <&hdmi_con_out>;
+				};
+			};
+		};
+	};
+
 	hdmi-decoder@4c {
 		compatible = "adi,adv7612";
 		reg = <0x4c>;
@@ -240,6 +312,30 @@ 
 	status = "okay";
 };
 
+&lvds0 {
+	status = "okay";
+
+	clocks = <&cpg CPG_MOD 727>,
+		 <&x12_clk>,
+		 <&extal_clk>;
+	clock-names = "fck", "dclkin.0", "extal";
+
+	ports {
+		port@1 {
+			lvds0_out: endpoint {
+				remote-endpoint = <&thc63lvd1024_in>;
+			};
+		};
+	};
+};
+
+&lvds1 {
+	clocks = <&cpg CPG_MOD 727>,
+		 <&x12_clk>,
+		 <&extal_clk>;
+	clock-names = "fck", "dclkin.0", "extal";
+};
+
 &ohci0 {
 	status = "okay";
 };