| Message ID | 20220112174612.10773-18-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Kieran Bingham |
| Headers | show |
| Series | Add RZ/G2L Display support | expand |
On Wed, Jan 12, 2022 at 05:46:01PM +0000, Biju Das wrote: > Extend the Renesas DU display bindings to support the r9a07g044l RZ/G2L. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > .../bindings/display/renesas,du.yaml | 54 +++++++++++++++++++ > 1 file changed, 54 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/renesas,du.yaml b/Documentation/devicetree/bindings/display/renesas,du.yaml > index 13efea574584..fc050b1088f3 100644 > --- a/Documentation/devicetree/bindings/display/renesas,du.yaml > +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml > @@ -40,6 +40,7 @@ properties: > - renesas,du-r8a77990 # for R-Car E3 compatible DU > - renesas,du-r8a77995 # for R-Car D3 compatible DU > - renesas,du-r8a779a0 # for R-Car V3U compatible DU > + - renesas,du-r9a07g044l # for RZ/G2L compatible DU > > reg: > maxItems: 1 > @@ -824,6 +825,59 @@ allOf: > - reset-names > - renesas,vsps > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - renesas,du-r9a07g044l > + then: > + properties: > + clocks: > + items: > + - description: LCDC Main clock > + - description: LCDC Register Access Clock > + - description: LCDC Video Clock > + > + clock-names: > + items: > + - const: du.0 > + - const: pclk > + - const: vclk > + > + interrupts: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + reset-names: > + items: > + - const: du.0 > + > + ports: > + properties: > + port@0: > + description: DPAD 0 > + port@1: > + description: DSI 0 > + port@2: false > + port@3: false > + > + required: > + - port@0 > + - port@1 > + > + renesas,vsps: > + minItems: 1 The minimum number of items is 1 by default if not otherwise specified. maxItems: 1 ??? > + > + required: > + - clock-names > + - interrupts > + - resets > + - reset-names > + - renesas,vsps > + > additionalProperties: false > > examples: > -- > 2.17.1 > >
Hi Rob, Thanks for the feedback. > Subject: Re: [RFC 17/28] dt-bindings: display: renesas,du: Document > r9a07g044l bindings > > On Wed, Jan 12, 2022 at 05:46:01PM +0000, Biju Das wrote: > > Extend the Renesas DU display bindings to support the r9a07g044l RZ/G2L. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > .../bindings/display/renesas,du.yaml | 54 +++++++++++++++++++ > > 1 file changed, 54 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/display/renesas,du.yaml > b/Documentation/devicetree/bindings/display/renesas,du.yaml > > index 13efea574584..fc050b1088f3 100644 > > --- a/Documentation/devicetree/bindings/display/renesas,du.yaml > > +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml > > @@ -40,6 +40,7 @@ properties: > > - renesas,du-r8a77990 # for R-Car E3 compatible DU > > - renesas,du-r8a77995 # for R-Car D3 compatible DU > > - renesas,du-r8a779a0 # for R-Car V3U compatible DU > > + - renesas,du-r9a07g044l # for RZ/G2L compatible DU > > > > reg: > > maxItems: 1 > > @@ -824,6 +825,59 @@ allOf: > > - reset-names > > - renesas,vsps > > > > + - if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - renesas,du-r9a07g044l > > + then: > > + properties: > > + clocks: > > + items: > > + - description: LCDC Main clock > > + - description: LCDC Register Access Clock > > + - description: LCDC Video Clock > > + > > + clock-names: > > + items: > > + - const: du.0 > > + - const: pclk > > + - const: vclk > > + > > + interrupts: > > + maxItems: 1 > > + > > + resets: > > + maxItems: 1 > > + > > + reset-names: > > + items: > > + - const: du.0 > > + > > + ports: > > + properties: > > + port@0: > > + description: DPAD 0 > > + port@1: > > + description: DSI 0 > > + port@2: false > > + port@3: false > > + > > + required: > > + - port@0 > > + - port@1 > > + > > + renesas,vsps: > > + minItems: 1 > > The minimum number of items is 1 by default if not otherwise specified. > > maxItems: 1 ??? Agreed, I should use maxItems: 1 Regards, Biju > > > + > > + required: > > + - clock-names > > + - interrupts > > + - resets > > + - reset-names > > + - renesas,vsps > > + > > additionalProperties: false > > > > examples: > > -- > > 2.17.1 > > > >
diff --git a/Documentation/devicetree/bindings/display/renesas,du.yaml b/Documentation/devicetree/bindings/display/renesas,du.yaml index 13efea574584..fc050b1088f3 100644 --- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -40,6 +40,7 @@ properties: - renesas,du-r8a77990 # for R-Car E3 compatible DU - renesas,du-r8a77995 # for R-Car D3 compatible DU - renesas,du-r8a779a0 # for R-Car V3U compatible DU + - renesas,du-r9a07g044l # for RZ/G2L compatible DU reg: maxItems: 1 @@ -824,6 +825,59 @@ allOf: - reset-names - renesas,vsps + - if: + properties: + compatible: + contains: + enum: + - renesas,du-r9a07g044l + then: + properties: + clocks: + items: + - description: LCDC Main clock + - description: LCDC Register Access Clock + - description: LCDC Video Clock + + clock-names: + items: + - const: du.0 + - const: pclk + - const: vclk + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + + reset-names: + items: + - const: du.0 + + ports: + properties: + port@0: + description: DPAD 0 + port@1: + description: DSI 0 + port@2: false + port@3: false + + required: + - port@0 + - port@1 + + renesas,vsps: + minItems: 1 + + required: + - clock-names + - interrupts + - resets + - reset-names + - renesas,vsps + additionalProperties: false examples:
Extend the Renesas DU display bindings to support the r9a07g044l RZ/G2L. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- .../bindings/display/renesas,du.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+)