| Message ID | 20220112174612.10773-25-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Add RZ/G2L Display support | expand |
Hello! On 1/12/22 8:46 PM, Biju Das wrote: > Add vspd node to SoC DTSI. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi > index 080b4c8af427..9dc407c37976 100644 > --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi > +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi > @@ -611,6 +611,18 @@ > status = "disabled"; > }; > > + vspd0: vsp@10870000 { > + compatible = "renesas,vsp2-r9a07g044"; > + reg = <0 0x10870000 0 0x10000>; > + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>, > + <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>, > + <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>; What about clock-names? [...] MBR, Sergey
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index 080b4c8af427..9dc407c37976 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -611,6 +611,18 @@ status = "disabled"; }; + vspd0: vsp@10870000 { + compatible = "renesas,vsp2-r9a07g044"; + reg = <0 0x10870000 0 0x10000>; + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>, + <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>, + <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>; + power-domains = <&cpg>; + resets = <&cpg R9A07G044_LCDC_RESET_N>; + renesas,fcp = <&fcpvd0>; + }; + fcpvd0: fcp@10880000 { compatible = "renesas,fcpv"; reg = <0 0x10880000 0 0x10000>;
Add vspd node to SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)