| Message ID | 20220425170530.200921-6-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | e42faad1ef822e186c20e60576b198e1ac9866c4 |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Add CAN, Audio, USB, WDT and Timer support | expand |
On Mon, Apr 25, 2022 at 7:05 PM Biju Das <biju.das.jz@bp.renesas.com> wrote: > Fillup the OSTM{0,1,2} stub nodes in RZ/G2UL (R9A07G043) SoC DTSI. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.19. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi index 60db9b02e0a7..d161600495aa 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi @@ -704,18 +704,36 @@ wdt2: watchdog@12800400 { }; ostm0: timer@12801000 { + compatible = "renesas,r9a07g043-ostm", + "renesas,ostm"; reg = <0x0 0x12801000 0x0 0x400>; - /* place holder */ + interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>; + clocks = <&cpg CPG_MOD R9A07G043_OSTM0_PCLK>; + resets = <&cpg R9A07G043_OSTM0_PRESETZ>; + power-domains = <&cpg>; + status = "disabled"; }; ostm1: timer@12801400 { + compatible = "renesas,r9a07g043-ostm", + "renesas,ostm"; reg = <0x0 0x12801400 0x0 0x400>; - /* place holder */ + interrupts = <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>; + clocks = <&cpg CPG_MOD R9A07G043_OSTM1_PCLK>; + resets = <&cpg R9A07G043_OSTM1_PRESETZ>; + power-domains = <&cpg>; + status = "disabled"; }; ostm2: timer@12801800 { + compatible = "renesas,r9a07g043-ostm", + "renesas,ostm"; reg = <0x0 0x12801800 0x0 0x400>; - /* place holder */ + interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>; + clocks = <&cpg CPG_MOD R9A07G043_OSTM2_PCLK>; + resets = <&cpg R9A07G043_OSTM2_PRESETZ>; + power-domains = <&cpg>; + status = "disabled"; }; };
Fillup the OSTM{0,1,2} stub nodes in RZ/G2UL (R9A07G043) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 24 +++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-)