| Message ID | 20200305050207.4159-1-luke.r.nels@gmail.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | eBPF JIT for RV32G | expand |
On Thu, 5 Mar 2020 at 06:02, Luke Nelson <lukenels@cs.washington.edu> wrote: > > This series adds an eBPF JIT for 32-bit RISC-V (RV32G) to the kernel, > adapted from the RV64 JIT and the 32-bit ARM JIT. > Nice work! Thanks for hanging in there! For the series, Acked-by: Björn Töpel <bjorn.topel@gmail.com> Reviewed-by: Björn Töpel <bjorn.topel@gmail.com>
On 3/5/20 6:40 AM, Björn Töpel wrote: > On Thu, 5 Mar 2020 at 06:02, Luke Nelson <lukenels@cs.washington.edu> wrote: >> >> This series adds an eBPF JIT for 32-bit RISC-V (RV32G) to the kernel, >> adapted from the RV64 JIT and the 32-bit ARM JIT. >> > > Nice work! Thanks for hanging in there! > > For the series, > Acked-by: Björn Töpel <bjorn.topel@gmail.com> > Reviewed-by: Björn Töpel <bjorn.topel@gmail.com> Applied, thanks everyone! P.s.: I fixed the MAINTAINERS entry in the last one to have both netdev and bpf to be consistent with all the other JIT entries there.
On Thu, Mar 05, 2020 at 04:19:27PM +0100, Daniel Borkmann wrote: > On 3/5/20 6:40 AM, Björn Töpel wrote: > > On Thu, 5 Mar 2020 at 06:02, Luke Nelson <lukenels@cs.washington.edu> wrote: > > > > > > This series adds an eBPF JIT for 32-bit RISC-V (RV32G) to the kernel, > > > adapted from the RV64 JIT and the 32-bit ARM JIT. > > > > > > > Nice work! Thanks for hanging in there! > > > > For the series, > > Acked-by: Björn Töpel <bjorn.topel@gmail.com> > > Reviewed-by: Björn Töpel <bjorn.topel@gmail.com> > > Applied, thanks everyone! > P.s.: I fixed the MAINTAINERS entry in the last one to have both netdev and bpf > to be consistent with all the other JIT entries there. Does parse-maintainer.pl happy about your changes?
On Thu, 5 Mar 2020 at 16:19, Daniel Borkmann <daniel@iogearbox.net> wrote: > [...] > Applied, thanks everyone! > > P.s.: I fixed the MAINTAINERS entry in the last one to have both netdev and bpf > to be consistent with all the other JIT entries there. Ah, I asked specifically Xi and Luke to *remove* the netdev entry, due to the bpf_devel_QA.rst change. :-)
On 3/5/20 5:53 PM, Björn Töpel wrote: > On Thu, 5 Mar 2020 at 16:19, Daniel Borkmann <daniel@iogearbox.net> wrote: >> > [...] >> Applied, thanks everyone! >> >> P.s.: I fixed the MAINTAINERS entry in the last one to have both netdev and bpf >> to be consistent with all the other JIT entries there. > > Ah, I asked specifically Xi and Luke to *remove* the netdev entry, due > to the bpf_devel_QA.rst change. :-) Ah right, although all the BPF entries in MAINTAINERS file have both lists mentioned today. I think it doesn't hurt to have potentially more eyes for reviews. Thanks, Daniel
This series adds an eBPF JIT for 32-bit RISC-V (RV32G) to the kernel, adapted from the RV64 JIT and the 32-bit ARM JIT. There are two main changes required for this to work compared to the RV64 JIT. First, eBPF registers are 64-bit, while RV32G registers are 32-bit. BPF registers either map directly to 2 RISC-V registers, or reside in stack scratch space and are saved and restored when used. Second, many 64-bit ALU operations do not trivially map to 32-bit operations. Operations that move bits between high and low words, such as ADD, LSH, MUL, and others must emulate the 64-bit behavior in terms of 32-bit instructions. Supported features: The RV32 JIT supports the same features and instructions as the RV64 JIT, with the following exceptions: - ALU64 DIV/MOD: Requires loops to implement on 32-bit hardware. - BPF_XADD | BPF_DW: There's no 8-byte atomic instruction in RV32. These features are also unsupported on other BPF JITs for 32-bit architectures. Testing: - lib/test_bpf.c test_bpf: Summary: 378 PASSED, 0 FAILED, [349/366 JIT'ed] test_bpf: test_skb_segment: Summary: 2 PASSED, 0 FAILED The tests that are not JITed are all due to use of 64-bit div/mod or 64-bit xadd. - tools/testing/selftests/bpf/test_verifier.c Summary: 1415 PASSED, 122 SKIPPED, 43 FAILED Tested both with and without BPF JIT hardening. This is the same set of tests that pass using the BPF interpreter with the JIT disabled. Running the BPF kernel tests / selftests on riscv32 is non-trivial, to help others reproduce the test results I made a guide here: https://github.com/lukenels/meta-linux-utils/tree/master/rv32-linux Verification and synthesis: We developed the RV32 JIT using our automated verification tool, Serval. We have used Serval in the past to verify patches to the RV64 JIT. We also used Serval to superoptimize the resulting code through program synthesis. You can find the tool and a guide to the approach and results here: https://github.com/uw-unsat/serval-bpf/tree/rv32-jit-v5 Thanks again for all the comments! Changelog: v4 -> v5: * Factored common code (build_body, bpf_int_jit_compile, etc) to bpf_jit_core.c (Björn Töpel). * Moved RV32-specific changes to bpf_jit.h from patch 1 to patch 2 (Björn Töpel). * Removed "_rv32_" from function names in JIT as it is redundant (Björn Töpel). * Added commit message to MAINTAINERS and made sure to keep entries in order (Andy Shevchenko). v3 -> v4: * Added more comments and cleaned up style nits (Björn Töpel). * Factored common code in RV64 and RV32 JITs into a separate header (Song Liu, Björn Töpel). * Added an optimization in the BPF_ALU64 BPF_ADD BPF_X case. * Updated MAINTAINERS and kernel documentation (Björn Töpel). v2 -> v3: * Added support for far jumps / branches similar to RV64 JIT. * Added support for tail calls. * Cleaned up code with more optimizations and comments. * Removed special zero-extension instruction from BPF_ALU64 case (Jiong Wang). v1 -> v2: * Added support for far conditional branches. * Added the zero-extension optimization (Jiong Wang). * Added more optimizations for operations with an immediate operand. Luke Nelson (4): riscv, bpf: factor common RISC-V JIT code riscv, bpf: add RV32G eBPF JIT bpf, doc: add BPF JIT for RV32G to BPF documentation MAINTAINERS: add entry for RV32G BPF JIT Documentation/admin-guide/sysctl/net.rst | 3 +- Documentation/networking/filter.txt | 2 +- MAINTAINERS | 13 +- arch/riscv/Kconfig | 2 +- arch/riscv/net/Makefile | 9 +- arch/riscv/net/bpf_jit.h | 514 +++++++ arch/riscv/net/bpf_jit_comp32.c | 1310 +++++++++++++++++ .../net/{bpf_jit_comp.c => bpf_jit_comp64.c} | 605 +------- arch/riscv/net/bpf_jit_core.c | 166 +++ 9 files changed, 2018 insertions(+), 606 deletions(-) create mode 100644 arch/riscv/net/bpf_jit.h create mode 100644 arch/riscv/net/bpf_jit_comp32.c rename arch/riscv/net/{bpf_jit_comp.c => bpf_jit_comp64.c} (69%) create mode 100644 arch/riscv/net/bpf_jit_core.c Cc: Jonathan Corbet <corbet@lwn.net> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Daniel Borkmann <daniel@iogearbox.net> Cc: Martin KaFai Lau <kafai@fb.com> Cc: Song Liu <songliubraving@fb.com> Cc: Yonghong Song <yhs@fb.com> Cc: Andrii Nakryiko <andriin@fb.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: "Björn Töpel" <bjorn.topel@gmail.com> Cc: Luke Nelson <luke.r.nels@gmail.com> Cc: Xi Wang <xi.wang@gmail.com> Cc: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Cc: Stephen Hemminger <stephen@networkplumber.org> Cc: Rob Herring <robh@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: linux-doc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: netdev@vger.kernel.org Cc: bpf@vger.kernel.org Cc: linux-riscv@lists.infradead.org