mbox series

[v2,0/3] Miscellaneous fixes for PMU driver

Message ID 20220513015522.910856-1-atishp@rivosinc.com (mailing list archive)
Headers show
Series Miscellaneous fixes for PMU driver | expand

Message

Atish Patra May 13, 2022, 1:55 a.m. UTC
This series fixes issues PMU driver code.
PATCH 1 & 3 are fixes for rv32 while PATCH 2 fixes a redundant
user page update issue during counter start.

Changes from v1->v2:
1. Add proper compile time rv32 checks.

Atish Patra (3):
RISC-V: Fix counter restart during overflow for RV32
RISC-V: Update user page mapping only once during start
RISC-V: Fix SBI PMU calls for RV32

drivers/perf/riscv_pmu.c     |  1 -
drivers/perf/riscv_pmu_sbi.c | 16 ++++++++++++++++
2 files changed, 16 insertions(+), 1 deletion(-)

--
2.25.1

Comments

Palmer Dabbelt June 2, 2022, 5:58 a.m. UTC | #1
On Thu, 12 May 2022 18:55:19 PDT (-0700), Atish Patra wrote:
> This series fixes issues PMU driver code.
> PATCH 1 & 3 are fixes for rv32 while PATCH 2 fixes a redundant
> user page update issue during counter start.
>
> Changes from v1->v2:
> 1. Add proper compile time rv32 checks.
>
> Atish Patra (3):
> RISC-V: Fix counter restart during overflow for RV32
> RISC-V: Update user page mapping only once during start
> RISC-V: Fix SBI PMU calls for RV32
>
> drivers/perf/riscv_pmu.c     |  1 -
> drivers/perf/riscv_pmu_sbi.c | 16 ++++++++++++++++
> 2 files changed, 16 insertions(+), 1 deletion(-)

+Will and Mark.

Will recently took some stuff for drivers/perf/riscv_* into his 
for-next/perf tree (which I didn't even know about until then, oops), 
but the previous stuff I took through the RISC-V tree.  Always happy to 
get stuff out of my tree, just LMK what you want me to do here.

I did some minor cleanups to the commit text and put them over at 
palmer/riscv-pmu_fixes, it's all passing my tests.  These generally look 
fine to me and they're all stable backports, so no big rush on the merge 
window (which I still have stuff for).
Will Deacon June 9, 2022, 1:51 p.m. UTC | #2
Hey Palmer,

On Wed, Jun 01, 2022 at 10:58:08PM -0700, Palmer Dabbelt wrote:
> On Thu, 12 May 2022 18:55:19 PDT (-0700), Atish Patra wrote:
> > This series fixes issues PMU driver code.
> > PATCH 1 & 3 are fixes for rv32 while PATCH 2 fixes a redundant
> > user page update issue during counter start.
> > 
> > Changes from v1->v2:
> > 1. Add proper compile time rv32 checks.
> > 
> > Atish Patra (3):
> > RISC-V: Fix counter restart during overflow for RV32
> > RISC-V: Update user page mapping only once during start
> > RISC-V: Fix SBI PMU calls for RV32
> > 
> > drivers/perf/riscv_pmu.c     |  1 -
> > drivers/perf/riscv_pmu_sbi.c | 16 ++++++++++++++++
> > 2 files changed, 16 insertions(+), 1 deletion(-)
> 
> +Will and Mark.
> 
> Will recently took some stuff for drivers/perf/riscv_* into his
> for-next/perf tree (which I didn't even know about until then, oops), but
> the previous stuff I took through the RISC-V tree.  Always happy to get
> stuff out of my tree, just LMK what you want me to do here.
> 
> I did some minor cleanups to the commit text and put them over at
> palmer/riscv-pmu_fixes, it's all passing my tests.  These generally look
> fine to me and they're all stable backports, so no big rush on the merge
> window (which I still have stuff for).

I don't have any perf driver fixes queued at the moment, so please just
include these changes along with any other riscv fixes you have.

Thanks,

Will