Message ID | 20230215145113.465558-1-alexghiti@rivosinc.com (mailing list archive) |
---|---|
Headers | show |
Series | riscv: Introduce KASLR | expand |
Alexandre Ghiti <alexghiti@rivosinc.com> writes: > The following KASLR implementation allows to randomize the kernel mapping: > > - virtually: we expect the bootloader to provide a seed in the device-tree > - physically: only implemented in the EFI stub, it relies on the firmware to > provide a seed using EFI_RNG_PROTOCOL. arm64 has a similar implementation > hence the patch 3 factorizes KASLR related functions for riscv to take > advantage. > > The new virtual kernel location is limited by the early page table that only > has one PUD and with the PMD alignment constraint, the kernel can only take > < 512 positions. > > Note that the patch "riscv: Use PUD/P4D/PGD pages for the linear > mapping" is necessary to retrieve the memory below the physical kernel > address, so that the EFI stub does not have to try to relocate the kernel > as close as possible to the start of dram. > > This patchset is rebased on top of: > > Introduce 64b relocatable kernel (https://lore.kernel.org/lkml/20230215143626.453491-1-alexghiti@rivosinc.com/) > RISC-V kasan rework (https://lore.kernel.org/lkml/Y6TTvku%2FyuSjm42j@spud/T/) > riscv: Use PUD/P4D/PGD pages for the linear mapping (https://lore.kernel.org/lkml/20230125114229.hrhsyw4aegrnmoau@orel/T/) > riscv: Allow to downgrade paging mode from the command line (https://lore.kernel.org/lkml/CAHVXubjeSMvfTPnvrnYRupOGx6+vUvUGfRS3piTeo=TH2cHKNg@mail.gmail.com/) > base-commit-tag: v6.2-rc7 > > This patchset was tested with u-boot boottime service for the seed on: > - ubuntu defconfig + kasan outline (sv39, sv48, sv57): OK > - ubuntu defconfig + kasan inline (sv39, sv48, sv57): OK > - ubuntu defconfg (sv39, sv48, sv57): OK I've taken the series for a spin (qemu u-boot UEFI, and qemu non-UEFI), on-top of the patches outline above, but with 6.2 proper. For the series: Reviewed-by: Björn Töpel <bjorn@rivosinc.com> Tested-by: Björn Töpel <bjorn@rivosinc.com>