| Message ID | 20230508142842.854564-1-apatel@ventanamicro.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Linux RISC-V AIA Support | expand |
Hey Anup, On Mon, May 08, 2023 at 07:58:31PM +0530, Anup Patel wrote: > The RISC-V AIA specification is now frozen as-per the RISC-V international > process. The latest frozen specifcation can be found at: > https://github.com/riscv/riscv-aia/releases/download/1.0-RC1/riscv-interrupts-1.0-RC1.pdf > > At a high-level, the AIA specification adds three things: > 1) AIA CSRs > - Improved local interrupt support > 2) Incoming Message Signaled Interrupt Controller (IMSIC) > - Per-HART MSI controller > - Support MSI virtualization > - Support IPI along with virtualization > 3) Advanced Platform-Level Interrupt Controller (APLIC) > - Wired interrupt controller > - In MSI-mode, converts wired interrupt into MSIs (i.e. MSI generator) > - In Direct-mode, injects external interrupts directly into HARTs > > For an overview of the AIA specification, refer the recent AIA virtualization > talk at KVM Forum 2022: > https://static.sched.com/hosted_files/kvmforum2022/a1/AIA_Virtualization_in_KVM_RISCV_final.pdf > https://www.youtube.com/watch?v=r071dL8Z0yo > > The PATCH3 of this series conflicts with the "irqchip/riscv-intc: Add ACPI > support" patch of the "Add basic ACPI support for RISC-V" series. > (Refer, https://lore.kernel.org/linux-riscv/20230508115237.216337-1-sunilvl@ventanamicro.com/) This series does not apply for me (or the patchwork automation) on top of v6.4-rc1, which was released prior to you sending this & contains the AIA definitions this series relies on. You note here that there is a *conflict* with Sunil's series, but what you actually did, as far as I can tell, is base your series on top of theirs? If you're going to do that, at least point it out so that reviewers don't have to figure out what your intention was :( Better yet, for the sake of our automation in particular, don't do it at all. Thanks, Conor.
The RISC-V AIA specification is now frozen as-per the RISC-V international process. The latest frozen specifcation can be found at: https://github.com/riscv/riscv-aia/releases/download/1.0-RC1/riscv-interrupts-1.0-RC1.pdf At a high-level, the AIA specification adds three things: 1) AIA CSRs - Improved local interrupt support 2) Incoming Message Signaled Interrupt Controller (IMSIC) - Per-HART MSI controller - Support MSI virtualization - Support IPI along with virtualization 3) Advanced Platform-Level Interrupt Controller (APLIC) - Wired interrupt controller - In MSI-mode, converts wired interrupt into MSIs (i.e. MSI generator) - In Direct-mode, injects external interrupts directly into HARTs For an overview of the AIA specification, refer the recent AIA virtualization talk at KVM Forum 2022: https://static.sched.com/hosted_files/kvmforum2022/a1/AIA_Virtualization_in_KVM_RISCV_final.pdf https://www.youtube.com/watch?v=r071dL8Z0yo The PATCH3 of this series conflicts with the "irqchip/riscv-intc: Add ACPI support" patch of the "Add basic ACPI support for RISC-V" series. (Refer, https://lore.kernel.org/linux-riscv/20230508115237.216337-1-sunilvl@ventanamicro.com/) To test this series, use QEMU v7.2 (or higher) and OpenSBI v1.2 (or higher). These patches can also be found in the riscv_aia_v3 branch at: https://github.com/avpatel/linux.git Changes since v2: - Rebased on Linux-6.4-rc1 - Addressed Rob's comments on DT bindings patches 4 and 8. - Addessed Marc's comments on IMSIC driver PATCH5 - Replaced use of OF apis in APLIC and IMSIC drivers with FWNODE apis this makes both drivers easily portable for ACPI support. This also removes unnecessary indirection from the APLIC and IMSIC drivers. - PATCH1 is a new patch for portability with ACPI support - PATCH2 is a new patch to fix probing in APLIC drivers for APLIC-only systems. - PATCH7 is a new patch which addresses the IOMMU DMA domain issues pointed out by SiFive Changes since v1: - Rebased on Linux-6.2-rc2 - Addressed comments on IMSIC DT bindings for PATCH4 - Use raw_spin_lock_irqsave() on ids_lock for PATCH5 - Improved MMIO alignment checks in PATCH5 to allow MMIO regions with holes. - Addressed comments on APLIC DT bindings for PATCH6 - Fixed warning splat in aplic_msi_write_msg() caused by zeroed MSI message in PATCH7 - Dropped DT property riscv,slow-ipi instead will have module parameter in future. Anup Patel (11): RISC-V: Add riscv_fw_parent_hartid() function of/irq: Set FWNODE_FLAG_BEST_EFFORT for the interrupt controller DT nodes irqchip/riscv-intc: Add support for RISC-V AIA dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller irqchip: Add RISC-V incoming MSI controller driver irqchip/riscv-imsic: Add support for PCI MSI irqdomain irqchip/riscv-imsic: Improve IOMMU DMA support dt-bindings: interrupt-controller: Add RISC-V advanced PLIC irqchip: Add RISC-V advanced PLIC driver RISC-V: Select APLIC and IMSIC drivers MAINTAINERS: Add entry for RISC-V AIA drivers .../interrupt-controller/riscv,aplic.yaml | 162 +++ .../interrupt-controller/riscv,imsics.yaml | 172 +++ MAINTAINERS | 12 + arch/riscv/Kconfig | 2 + arch/riscv/include/asm/processor.h | 3 + arch/riscv/kernel/cpu.c | 12 + drivers/iommu/dma-iommu.c | 38 + drivers/irqchip/Kconfig | 20 +- drivers/irqchip/Makefile | 2 + drivers/irqchip/irq-riscv-aplic.c | 750 ++++++++++++ drivers/irqchip/irq-riscv-imsic.c | 1080 +++++++++++++++++ drivers/irqchip/irq-riscv-intc.c | 36 +- drivers/of/irq.c | 10 + include/linux/iommu.h | 6 + include/linux/irqchip/riscv-aplic.h | 119 ++ include/linux/irqchip/riscv-imsic.h | 86 ++ 16 files changed, 2503 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml create mode 100644 drivers/irqchip/irq-riscv-aplic.c create mode 100644 drivers/irqchip/irq-riscv-imsic.c create mode 100644 include/linux/irqchip/riscv-aplic.h create mode 100644 include/linux/irqchip/riscv-imsic.h