[bpf-next,0/7] Add support cpu v4 insns for RV64

Add support cpu v4 instructions for RV64. The relevant tests have passed as show bellow: # ./test_progs-cpuv4 -a ldsx_insn,verifier_sdiv,verifier_movsx,verifier_ldsx,verifier_gotol,verifier_bswap #116/1 ldsx_insn/map_val and probed_memory:OK #116/2 ldsx_insn/ctx_member_sign_ext:OK #116/3 ldsx_insn/ctx_member_narrow_sign_ext:OK #116 ldsx_insn:OK #309/1 verifier_bswap/BSWAP, 16:OK #309/2 verifier_bswap/BSWAP, 16 @unpriv:OK #309/3 verifier_bswap/BSWAP, 32:OK #309/4 verifier_bswap/BSWAP, 32 @unpriv:OK #309/5 verifier_bswap/BSWAP, 64:OK #309/6 verifier_bswap/BSWAP, 64 @unpriv:OK #309 verifier_bswap:OK #323/1 verifier_gotol/gotol, small_imm:OK #323/2 verifier_gotol/gotol, small_imm @unpriv:OK #323 verifier_gotol:OK #331/1 verifier_ldsx/LDSX, S8:OK #331/2 verifier_ldsx/LDSX, S8 @unpriv:OK #331/3 verifier_ldsx/LDSX, S16:OK #331/4 verifier_ldsx/LDSX, S16 @unpriv:OK #331/5 verifier_ldsx/LDSX, S32:OK #331/6 verifier_ldsx/LDSX, S32 @unpriv:OK #331/7 verifier_ldsx/LDSX, S8 range checking, privileged:OK #331/8 verifier_ldsx/LDSX, S16 range checking:OK #331/9 verifier_ldsx/LDSX, S16 range checking @unpriv:OK #331/10 verifier_ldsx/LDSX, S32 range checking:OK #331/11 verifier_ldsx/LDSX, S32 range checking @unpriv:OK #331 verifier_ldsx:OK #342/1 verifier_movsx/MOV32SX, S8:OK #342/2 verifier_movsx/MOV32SX, S8 @unpriv:OK #342/3 verifier_movsx/MOV32SX, S16:OK #342/4 verifier_movsx/MOV32SX, S16 @unpriv:OK #342/5 verifier_movsx/MOV64SX, S8:OK #342/6 verifier_movsx/MOV64SX, S8 @unpriv:OK #342/7 verifier_movsx/MOV64SX, S16:OK #342/8 verifier_movsx/MOV64SX, S16 @unpriv:OK #342/9 verifier_movsx/MOV64SX, S32:OK #342/10 verifier_movsx/MOV64SX, S32 @unpriv:OK #342/11 verifier_movsx/MOV32SX, S8, range_check:OK #342/12 verifier_movsx/MOV32SX, S8, range_check @unpriv:OK #342/13 verifier_movsx/MOV32SX, S16, range_check:OK #342/14 verifier_movsx/MOV32SX, S16, range_check @unpriv:OK #342/15 verifier_movsx/MOV32SX, S16, range_check 2:OK #342/16 verifier_movsx/MOV32SX, S16, range_check 2 @unpriv:OK #342/17 verifier_movsx/MOV64SX, S8, range_check:OK #342/18 verifier_movsx/MOV64SX, S8, range_check @unpriv:OK #342/19 verifier_movsx/MOV64SX, S16, range_check:OK #342/20 verifier_movsx/MOV64SX, S16, range_check @unpriv:OK #342/21 verifier_movsx/MOV64SX, S32, range_check:OK #342/22 verifier_movsx/MOV64SX, S32, range_check @unpriv:OK #342/23 verifier_movsx/MOV64SX, S16, R10 Sign Extension:OK #342/24 verifier_movsx/MOV64SX, S16, R10 Sign Extension @unpriv:OK #342 verifier_movsx:OK #354/1 verifier_sdiv/SDIV32, non-zero imm divisor, check 1:OK #354/2 verifier_sdiv/SDIV32, non-zero imm divisor, check 1 @unpriv:OK #354/3 verifier_sdiv/SDIV32, non-zero imm divisor, check 2:OK #354/4 verifier_sdiv/SDIV32, non-zero imm divisor, check 2 @unpriv:OK #354/5 verifier_sdiv/SDIV32, non-zero imm divisor, check 3:OK #354/6 verifier_sdiv/SDIV32, non-zero imm divisor, check 3 @unpriv:OK #354/7 verifier_sdiv/SDIV32, non-zero imm divisor, check 4:OK #354/8 verifier_sdiv/SDIV32, non-zero imm divisor, check 4 @unpriv:OK #354/9 verifier_sdiv/SDIV32, non-zero imm divisor, check 5:OK #354/10 verifier_sdiv/SDIV32, non-zero imm divisor, check 5 @unpriv:OK #354/11 verifier_sdiv/SDIV32, non-zero imm divisor, check 6:OK #354/12 verifier_sdiv/SDIV32, non-zero imm divisor, check 6 @unpriv:OK #354/13 verifier_sdiv/SDIV32, non-zero imm divisor, check 7:OK #354/14 verifier_sdiv/SDIV32, non-zero imm divisor, check 7 @unpriv:OK #354/15 verifier_sdiv/SDIV32, non-zero imm divisor, check 8:OK #354/16 verifier_sdiv/SDIV32, non-zero imm divisor, check 8 @unpriv:OK #354/17 verifier_sdiv/SDIV32, non-zero reg divisor, check 1:OK #354/18 verifier_sdiv/SDIV32, non-zero reg divisor, check 1 @unpriv:OK #354/19 verifier_sdiv/SDIV32, non-zero reg divisor, check 2:OK #354/20 verifier_sdiv/SDIV32, non-zero reg divisor, check 2 @unpriv:OK #354/21 verifier_sdiv/SDIV32, non-zero reg divisor, check 3:OK #354/22 verifier_sdiv/SDIV32, non-zero reg divisor, check 3 @unpriv:OK #354/23 verifier_sdiv/SDIV32, non-zero reg divisor, check 4:OK #354/24 verifier_sdiv/SDIV32, non-zero reg divisor, check 4 @unpriv:OK #354/25 verifier_sdiv/SDIV32, non-zero reg divisor, check 5:OK #354/26 verifier_sdiv/SDIV32, non-zero reg divisor, check 5 @unpriv:OK #354/27 verifier_sdiv/SDIV32, non-zero reg divisor, check 6:OK #354/28 verifier_sdiv/SDIV32, non-zero reg divisor, check 6 @unpriv:OK #354/29 verifier_sdiv/SDIV32, non-zero reg divisor, check 7:OK #354/30 verifier_sdiv/SDIV32, non-zero reg divisor, check 7 @unpriv:OK #354/31 verifier_sdiv/SDIV32, non-zero reg divisor, check 8:OK #354/32 verifier_sdiv/SDIV32, non-zero reg divisor, check 8 @unpriv:OK #354/33 verifier_sdiv/SDIV64, non-zero imm divisor, check 1:OK #354/34 verifier_sdiv/SDIV64, non-zero imm divisor, check 1 @unpriv:OK #354/35 verifier_sdiv/SDIV64, non-zero imm divisor, check 2:OK #354/36 verifier_sdiv/SDIV64, non-zero imm divisor, check 2 @unpriv:OK #354/37 verifier_sdiv/SDIV64, non-zero imm divisor, check 3:OK #354/38 verifier_sdiv/SDIV64, non-zero imm divisor, check 3 @unpriv:OK #354/39 verifier_sdiv/SDIV64, non-zero imm divisor, check 4:OK #354/40 verifier_sdiv/SDIV64, non-zero imm divisor, check 4 @unpriv:OK #354/41 verifier_sdiv/SDIV64, non-zero imm divisor, check 5:OK #354/42 verifier_sdiv/SDIV64, non-zero imm divisor, check 5 @unpriv:OK #354/43 verifier_sdiv/SDIV64, non-zero imm divisor, check 6:OK #354/44 verifier_sdiv/SDIV64, non-zero imm divisor, check 6 @unpriv:OK #354/45 verifier_sdiv/SDIV64, non-zero reg divisor, check 1:OK #354/46 verifier_sdiv/SDIV64, non-zero reg divisor, check 1 @unpriv:OK #354/47 verifier_sdiv/SDIV64, non-zero reg divisor, check 2:OK #354/48 verifier_sdiv/SDIV64, non-zero reg divisor, check 2 @unpriv:OK #354/49 verifier_sdiv/SDIV64, non-zero reg divisor, check 3:OK #354/50 verifier_sdiv/SDIV64, non-zero reg divisor, check 3 @unpriv:OK #354/51 verifier_sdiv/SDIV64, non-zero reg divisor, check 4:OK #354/52 verifier_sdiv/SDIV64, non-zero reg divisor, check 4 @unpriv:OK #354/53 verifier_sdiv/SDIV64, non-zero reg divisor, check 5:OK #354/54 verifier_sdiv/SDIV64, non-zero reg divisor, check 5 @unpriv:OK #354/55 verifier_sdiv/SDIV64, non-zero reg divisor, check 6:OK #354/56 verifier_sdiv/SDIV64, non-zero reg divisor, check 6 @unpriv:OK #354/57 verifier_sdiv/SMOD32, non-zero imm divisor, check 1:OK #354/58 verifier_sdiv/SMOD32, non-zero imm divisor, check 1 @unpriv:OK #354/59 verifier_sdiv/SMOD32, non-zero imm divisor, check 2:OK #354/60 verifier_sdiv/SMOD32, non-zero imm divisor, check 2 @unpriv:OK #354/61 verifier_sdiv/SMOD32, non-zero imm divisor, check 3:OK #354/62 verifier_sdiv/SMOD32, non-zero imm divisor, check 3 @unpriv:OK #354/63 verifier_sdiv/SMOD32, non-zero imm divisor, check 4:OK #354/64 verifier_sdiv/SMOD32, non-zero imm divisor, check 4 @unpriv:OK #354/65 verifier_sdiv/SMOD32, non-zero imm divisor, check 5:OK #354/66 verifier_sdiv/SMOD32, non-zero imm divisor, check 5 @unpriv:OK #354/67 verifier_sdiv/SMOD32, non-zero imm divisor, check 6:OK #354/68 verifier_sdiv/SMOD32, non-zero imm divisor, check 6 @unpriv:OK #354/69 verifier_sdiv/SMOD32, non-zero reg divisor, check 1:OK #354/70 verifier_sdiv/SMOD32, non-zero reg divisor, check 1 @unpriv:OK #354/71 verifier_sdiv/SMOD32, non-zero reg divisor, check 2:OK #354/72 verifier_sdiv/SMOD32, non-zero reg divisor, check 2 @unpriv:OK #354/73 verifier_sdiv/SMOD32, non-zero reg divisor, check 3:OK #354/74 verifier_sdiv/SMOD32, non-zero reg divisor, check 3 @unpriv:OK #354/75 verifier_sdiv/SMOD32, non-zero reg divisor, check 4:OK #354/76 verifier_sdiv/SMOD32, non-zero reg divisor, check 4 @unpriv:OK #354/77 verifier_sdiv/SMOD32, non-zero reg divisor, check 5:OK #354/78 verifier_sdiv/SMOD32, non-zero reg divisor, check 5 @unpriv:OK #354/79 verifier_sdiv/SMOD32, non-zero reg divisor, check 6:OK #354/80 verifier_sdiv/SMOD32, non-zero reg divisor, check 6 @unpriv:OK #354/81 verifier_sdiv/SMOD64, non-zero imm divisor, check 1:OK #354/82 verifier_sdiv/SMOD64, non-zero imm divisor, check 1 @unpriv:OK #354/83 verifier_sdiv/SMOD64, non-zero imm divisor, check 2:OK #354/84 verifier_sdiv/SMOD64, non-zero imm divisor, check 2 @unpriv:OK #354/85 verifier_sdiv/SMOD64, non-zero imm divisor, check 3:OK #354/86 verifier_sdiv/SMOD64, non-zero imm divisor, check 3 @unpriv:OK #354/87 verifier_sdiv/SMOD64, non-zero imm divisor, check 4:OK #354/88 verifier_sdiv/SMOD64, non-zero imm divisor, check 4 @unpriv:OK #354/89 verifier_sdiv/SMOD64, non-zero imm divisor, check 5:OK #354/90 verifier_sdiv/SMOD64, non-zero imm divisor, check 5 @unpriv:OK #354/91 verifier_sdiv/SMOD64, non-zero imm divisor, check 6:OK #354/92 verifier_sdiv/SMOD64, non-zero imm divisor, check 6 @unpriv:OK #354/93 verifier_sdiv/SMOD64, non-zero imm divisor, check 7:OK #354/94 verifier_sdiv/SMOD64, non-zero imm divisor, check 7 @unpriv:OK #354/95 verifier_sdiv/SMOD64, non-zero imm divisor, check 8:OK #354/96 verifier_sdiv/SMOD64, non-zero imm divisor, check 8 @unpriv:OK #354/97 verifier_sdiv/SMOD64, non-zero reg divisor, check 1:OK #354/98 verifier_sdiv/SMOD64, non-zero reg divisor, check 1 @unpriv:OK #354/99 verifier_sdiv/SMOD64, non-zero reg divisor, check 2:OK #354/100 verifier_sdiv/SMOD64, non-zero reg divisor, check 2 @unpriv:OK #354/101 verifier_sdiv/SMOD64, non-zero reg divisor, check 3:OK #354/102 verifier_sdiv/SMOD64, non-zero reg divisor, check 3 @unpriv:OK #354/103 verifier_sdiv/SMOD64, non-zero reg divisor, check 4:OK #354/104 verifier_sdiv/SMOD64, non-zero reg divisor, check 4 @unpriv:OK #354/105 verifier_sdiv/SMOD64, non-zero reg divisor, check 5:OK #354/106 verifier_sdiv/SMOD64, non-zero reg divisor, check 5 @unpriv:OK #354/107 verifier_sdiv/SMOD64, non-zero reg divisor, check 6:OK #354/108 verifier_sdiv/SMOD64, non-zero reg divisor, check 6 @unpriv:OK #354/109 verifier_sdiv/SMOD64, non-zero reg divisor, check 7:OK #354/110 verifier_sdiv/SMOD64, non-zero reg divisor, check 7 @unpriv:OK #354/111 verifier_sdiv/SMOD64, non-zero reg divisor, check 8:OK #354/112 verifier_sdiv/SMOD64, non-zero reg divisor, check 8 @unpriv:OK #354/113 verifier_sdiv/SDIV32, zero divisor:OK #354/114 verifier_sdiv/SDIV32, zero divisor @unpriv:OK #354/115 verifier_sdiv/SDIV64, zero divisor:OK #354/116 verifier_sdiv/SDIV64, zero divisor @unpriv:OK #354/117 verifier_sdiv/SMOD32, zero divisor:OK #354/118 verifier_sdiv/SMOD32, zero divisor @unpriv:OK #354/119 verifier_sdiv/SMOD64, zero divisor:OK #354/120 verifier_sdiv/SMOD64, zero divisor @unpriv:OK #354 verifier_sdiv:OK Summary: 6/166 PASSED, 0 SKIPPED, 0 FAILED NOTE: ldsx_insn testcase uses fentry and needs to rely on ftrace direct call [0]. [0] https://lore.kernel.org/all/20230627111612.761164-1-suagrfillet@gmail.com/ Pu Lehui (7): riscv, bpf: Fix missing exception handling and redundant zext for LDX_B/H/W riscv, bpf: Support sign-extension load insns riscv, bpf: Support sign-extension mov insns riscv, bpf: Support 32-bit offset jmp insn riscv, bpf: Support signed div/mod insns riscv, bpf: Support unconditional bswap insn selftests/bpf: Enable cpu v4 tests for RV64 arch/riscv/net/bpf_jit.h | 30 ++++++ arch/riscv/net/bpf_jit_comp64.c | 102 ++++++++++++++---- .../selftests/bpf/progs/test_ldsx_insn.c | 3 +- .../selftests/bpf/progs/verifier_bswap.c | 3 +- .../selftests/bpf/progs/verifier_gotol.c | 3 +- .../selftests/bpf/progs/verifier_ldsx.c | 3 +- .../selftests/bpf/progs/verifier_movsx.c | 3 +- .../selftests/bpf/progs/verifier_sdiv.c | 3 +- 8 files changed, 122 insertions(+), 28 deletions(-)

Message ID	20230823231059.3363698-1-pulehui@huaweicloud.com (mailing list archive)
Headers	show Return-Path: <linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org> From: Pu Lehui <pulehui@huaweicloud.com> To: linux-riscv@lists.infradead.org, bpf@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= <bjorn@kernel.org>, Yonghong Song <yhs@fb.com>, Alexei Starovoitov <ast@kernel.org>, Daniel Borkmann <daniel@iogearbox.net>, Andrii Nakryiko <andrii@kernel.org>, Martin KaFai Lau <martin.lau@linux.dev>, Song Liu <song@kernel.org>, John Fastabend <john.fastabend@gmail.com>, KP Singh <kpsingh@kernel.org>, Stanislav Fomichev <sdf@google.com>, Hao Luo <haoluo@google.com>, Jiri Olsa <jolsa@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>, Xu Kuohai <xukuohai@huawei.com>, Puranjay Mohan <puranjay12@gmail.com>, Pu Lehui <pulehui@huawei.com>, Pu Lehui <pulehui@huaweicloud.com> Subject: [PATCH bpf-next 0/7] Add support cpu v4 insns for RV64 Date: Wed, 23 Aug 2023 23:10:52 +0000 Message-Id: <20230823231059.3363698-1-pulehui@huaweicloud.com> MIME-Version: 1.0 Precedence: list Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org
Series	Add support cpu v4 insns for RV64 \| expand [bpf-next,0/7] Add support cpu v4 insns for RV64 [bpf-next,1/7] riscv, bpf: Fix missing exception handling and redundant zext for LDX_B/H/W [bpf-next,2/7] riscv, bpf: Support sign-extension load insns [bpf-next,3/7] riscv, bpf: Support sign-extension mov insns [bpf-next,4/7] riscv, bpf: Support 32-bit offset jmp insn [bpf-next,5/7] riscv, bpf: Support signed div/mod insns [bpf-next,6/7] riscv, bpf: Support unconditional bswap insn [bpf-next,7/7] selftests/bpf: Enable cpu v4 tests for RV64

[bpf-next,0/7] Add support cpu v4 insns for RV64

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