mbox series

[v3,0/4] membarrier: riscv: Core serializing command

Message ID 20240110145533.60234-1-parri.andrea@gmail.com (mailing list archive)
Headers show
Series membarrier: riscv: Core serializing command | expand

Message

Andrea Parri Jan. 10, 2024, 2:55 p.m. UTC 
Changes since v2 ([1]):
  - amaned inline comments
  - drop ARCH_HAS_MEMBARRIER, create membarrrier.rst

Changes since v1 ([2]):
  - add smp_mb() in switch_mm()
  - introduce ARCH_HAS_MEMBARRIER, amend documentation

Changes since RFC ([3]):
  - introduce prepare_sync_core_cmd()
  - fix nosmp builds

[1] https://lore.kernel.org/lkml/20231211094414.8078-1-parri.andrea@gmail.com/
[2] https://lore.kernel.org/lkml/20231127103235.28442-1-parri.andrea@gmail.com/
[3] https://lore.kernel.org/lkml/20230803040111.5101-1-parri.andrea@gmail.com/

Andrea Parri (4):
  membarrier: riscv: Add full memory barrier in switch_mm()
  membarrier: Create Documentation/scheduler/membarrier.rst
  locking: Introduce prepare_sync_core_cmd()
  membarrier: riscv: Provide core serializing command

 .../membarrier-sync-core/arch-support.txt     | 18 ++++++-
 Documentation/scheduler/index.rst             |  1 +
 Documentation/scheduler/membarrier.rst        | 37 ++++++++++++++
 MAINTAINERS                                   |  4 +-
 arch/riscv/Kconfig                            |  4 ++
 arch/riscv/include/asm/membarrier.h           | 50 +++++++++++++++++++
 arch/riscv/include/asm/sync_core.h            | 29 +++++++++++
 arch/riscv/mm/context.c                       |  2 +
 include/linux/sync_core.h                     | 16 +++++-
 init/Kconfig                                  |  3 ++
 kernel/sched/core.c                           | 16 ++++--
 kernel/sched/membarrier.c                     | 13 +++--
 12 files changed, 183 insertions(+), 10 deletions(-)
 create mode 100644 Documentation/scheduler/membarrier.rst
 create mode 100644 arch/riscv/include/asm/membarrier.h
 create mode 100644 arch/riscv/include/asm/sync_core.h

Comments

Andrea Parri Jan. 24, 2024, 2:13 p.m. UTC | #1 
On Wed, Jan 10, 2024 at 03:55:29PM +0100, Andrea Parri wrote:
> Changes since v2 ([1]):
>   - amaned inline comments
>   - drop ARCH_HAS_MEMBARRIER, create membarrrier.rst
> 
> Changes since v1 ([2]):
>   - add smp_mb() in switch_mm()
>   - introduce ARCH_HAS_MEMBARRIER, amend documentation
> 
> Changes since RFC ([3]):
>   - introduce prepare_sync_core_cmd()
>   - fix nosmp builds
> 
> [1] https://lore.kernel.org/lkml/20231211094414.8078-1-parri.andrea@gmail.com/
> [2] https://lore.kernel.org/lkml/20231127103235.28442-1-parri.andrea@gmail.com/
> [3] https://lore.kernel.org/lkml/20230803040111.5101-1-parri.andrea@gmail.com/
> 
> Andrea Parri (4):
>   membarrier: riscv: Add full memory barrier in switch_mm()
>   membarrier: Create Documentation/scheduler/membarrier.rst
>   locking: Introduce prepare_sync_core_cmd()
>   membarrier: riscv: Provide core serializing command

Gentle ping to the riscv&membarrier people who have survived the merge
window: any other thoughts on this series? suggestions for a v4?

  Andrea