mbox series

[bpf-next,v4,0/2] bpf,riscv: Add support for BPF Arena

Message ID 20240404114203.105970-1-puranjay12@gmail.com (mailing list archive)
Headers show
Series bpf,riscv: Add support for BPF Arena | expand

Message

Puranjay Mohan April 4, 2024, 11:42 a.m. UTC
Changes in V4:
V3: https://lore.kernel.org/all/20240326224943.86912-1-puranjay12@gmail.com/
- Fix some style issues.
- Add Tested-by: and Reviewed-by: tags by Pu Lehui and Björn

Changes in V3
V2: https://lore.kernel.org/bpf/20240325155434.65589-1-puranjay12@gmail.com/
- Use REG_DONT_CLEAR_MARKER in place of DONT_CLEAR as the name.
- Use RV_REG_ZERO for the above as it is guaranteed to be never used in as
  dst/src register in BPF LDX/STX/ST instructions.
- Use #define RV_REG_ARENA for RV_REG_S7

Changes in V2
V1: https://lore.kernel.org/bpf/20240323154652.54572-1-puranjay12@gmail.com/
- Used S7 in place of S11 for storing the kernel_vm_start
- Used 17 in place of 16 for DONT_CLEAR marker
- Remove an unused variable
- Removed some misleading information from the commit message.

This series adds the support for PROBE_MEM32 and bpf_addr_space_cast
instructions to the RISCV BPF JIT. These two instructions allow the
enablement of BPF Arena.

All arena related selftests are passing:

  root@rv-tester:~/bpf# uname -p
  riscv64
  root@rv-tester:~/bpf# ./test_progs -a "*arena*"
  #3/1     arena_htab/arena_htab_llvm:OK
  #3/2     arena_htab/arena_htab_asm:OK
  #3       arena_htab:OK
  #4/1     arena_list/arena_list_1:OK
  #4/2     arena_list/arena_list_1000:OK
  #4       arena_list:OK
  #434/1   verifier_arena/basic_alloc1:OK
  #434/2   verifier_arena/basic_alloc2:OK
  #434/3   verifier_arena/basic_alloc3:OK
  #434/4   verifier_arena/iter_maps1:OK
  #434/5   verifier_arena/iter_maps2:OK
  #434/6   verifier_arena/iter_maps3:OK
  #434     verifier_arena:OK
  Summary: 3/10 PASSED, 0 SKIPPED, 0 FAILED

Puranjay Mohan (2):
  bpf,riscv: Implement PROBE_MEM32 pseudo instructions
  bpf,riscv: Implement bpf_addr_space_cast instruction

 arch/riscv/net/bpf_jit.h        |   2 +
 arch/riscv/net/bpf_jit_comp64.c | 203 +++++++++++++++++++++++++++++++-
 arch/riscv/net/bpf_jit_core.c   |   2 +
 3 files changed, 205 insertions(+), 2 deletions(-)

Comments

patchwork-bot+netdevbpf@kernel.org April 4, 2024, 2:50 p.m. UTC | #1
Hello:

This series was applied to bpf/bpf-next.git (master)
by Daniel Borkmann <daniel@iogearbox.net>:

On Thu,  4 Apr 2024 11:42:01 +0000 you wrote:
> Changes in V4:
> V3: https://lore.kernel.org/all/20240326224943.86912-1-puranjay12@gmail.com/
> - Fix some style issues.
> - Add Tested-by: and Reviewed-by: tags by Pu Lehui and Björn
> 
> Changes in V3
> V2: https://lore.kernel.org/bpf/20240325155434.65589-1-puranjay12@gmail.com/
> - Use REG_DONT_CLEAR_MARKER in place of DONT_CLEAR as the name.
> - Use RV_REG_ZERO for the above as it is guaranteed to be never used in as
>   dst/src register in BPF LDX/STX/ST instructions.
> - Use #define RV_REG_ARENA for RV_REG_S7
> 
> [...]

Here is the summary with links:
  - [bpf-next,v4,1/2] bpf,riscv: Implement PROBE_MEM32 pseudo instructions
    https://git.kernel.org/bpf/bpf-next/c/633a6e01d1a2
  - [bpf-next,v4,2/2] bpf,riscv: Implement bpf_addr_space_cast instruction
    https://git.kernel.org/bpf/bpf-next/c/21ab0b6d0cfc

You are awesome, thank you!