Message ID | 20240502-cpufeature_fixes-v4-0-b3d1a088722d@rivosinc.com (mailing list archive) |
---|---|
Headers | show |
Series | riscv: Extension parsing fixes | expand |
Hello: This series was applied to riscv/linux.git (for-next) by Palmer Dabbelt <palmer@rivosinc.com>: On Thu, 02 May 2024 21:50:49 -0700 you wrote: > This series contains two minor fixes for the extension parsing in > cpufeature.c. > > Some T-Head boards without vector 1.0 support report "v" in the isa > string in their DT which will cause the kernel to run vector code. The > code to blacklist "v" from these boards was doing so by using > riscv_cached_mvendorid() which has not been populated at the time of > extension parsing. This fix instead greedily reads the mvendorid CSR of > the boot hart to determine if the cpu is from T-Head. > > [...] Here is the summary with links: - [v4,1/2] riscv: cpufeature: Fix thead vector hwcap removal https://git.kernel.org/riscv/c/e482eab4d1eb - [v4,2/2] riscv: cpufeature: Fix extension subset checking https://git.kernel.org/riscv/c/e67e98ee8952 You are awesome, thank you!
This series contains two minor fixes for the extension parsing in cpufeature.c. Some T-Head boards without vector 1.0 support report "v" in the isa string in their DT which will cause the kernel to run vector code. The code to blacklist "v" from these boards was doing so by using riscv_cached_mvendorid() which has not been populated at the time of extension parsing. This fix instead greedily reads the mvendorid CSR of the boot hart to determine if the cpu is from T-Head. The other fix is for an incorrect indexing bug. riscv extensions sometimes imply other extensions. When adding these "subset" extensions to the hardware capabilities array, they need to be checked if they are valid. The current code only checks if the extension that is including other extensions is valid and not the subset extensions. These patches were previously included in: https://lore.kernel.org/lkml/20240420-dev-charlie-support_thead_vector_6_9-v3-0-67cff4271d1d@rivosinc.com/ Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> --- Changes in v4: - Delete comment - Link to v3: https://lore.kernel.org/r/20240429-cpufeature_fixes-v3-0-6aa11dde513b@rivosinc.com Changes in v3: - Change comment about assuming all harts have the same vendorid/archid, to just state that only the boot hart is probed. - Link to v2: https://lore.kernel.org/r/20240426-cpufeature_fixes-v2-0-7377442b1327@rivosinc.com Changes in v2: - Move comment about assuming all harts to have the same vendorid/archid to apply specifically to the code that expects that (Drew) - Link to v1: https://lore.kernel.org/r/20240424-cpufeature_fixes-v1-0-585e73d2226b@rivosinc.com --- Charlie Jenkins (2): riscv: cpufeature: Fix thead vector hwcap removal riscv: cpufeature: Fix extension subset checking arch/riscv/include/asm/sbi.h | 2 ++ arch/riscv/kernel/cpu.c | 40 ++++++++++++++++++++++++++++++++++++---- arch/riscv/kernel/cpufeature.c | 10 +++++++--- 3 files changed, 45 insertions(+), 7 deletions(-) --- base-commit: ed30a4a51bb196781c8058073ea720133a65596f change-id: 20240424-cpufeature_fixes-91bec4d793e7