[linux,v2,00/20] Add support for Microchip PIC64GX Curiosity Kit

Message

[e-mail] Sept. 30, 2024, 9:54 a.m. UTC

From: Pierre-Henry Moussay <[e-mail]>

Changes since v1:
- Limit sdhci to HS (High Speed, 50MHz at 3.3V) mode max
- Fix I2C dt-bindings, remove microchip,mpfs-i2c fallback
- remove duplicated pic64gx-clock.h
- Update Microchip dts Makefile
- Update PIC64GX dts and dtsi (fix model, sort node)
- Remove microchip,pic64gx-clock.h present in previous patchset
- Reword commits messages

Hi all,

This V2 patchset is incomplete and doesn't address all the
comments from the V1 patchset. More precisely the request on the following
commit have not been addressed:
[PATCH 08/17] dt-bindings: clock: mpfs-clkcfg: Add PIC64GX compatibility
This will be fix in a V3 coming in due time.

This patch series aims to add support for Microchip PIC64GX Curiosity
Kit to the Linux kernel

Microchip PIC64GX Curiosity Kit is a compact development board based
on PIC64GX (PIC64GX1000-V/FCS)
The kit includes:
 - 1 Gb DDR4 SDRAM
 - microSD slot (used for boot)
 - 3x UART (among which 1 is used by the FSB UART 0)
 - 1x Gb Ethernet
 - various connectors, including mikroBUS connector,
   Raspberry PI MIPI RX Connector
 - 1x JTAG

Note: A eFP5 (FTDI based) ensures multiplexing of JTAG and 3 UART to USB

Thank you for your time and consideration.

Sincerely,
Pierre-Henry Moussay

Pierre-Henry Moussay (20):
  dt-bindings: can: mpfs: add PIC64GX CAN compatibility
  dt-bindings: usb: add PIC64GX compatibility to mpfs-musb driver
  dt-bindings: mbox: add PIC64GX mailbox compatibility to MPFS mailbox
  dt-bindings: spi: add PIC64GX SPI/QSPI compatibility to MPFS SPI/QSPI
    bindings
  dt-bindings: gpio: mpfs-gpio: Add PIC64GX GPIO compatibility
  dt-bindings: cache: sifive,ccache0: add a PIC64GX compatible
  dt-bindings: clock: mpfs-ccc: Add PIC64GX compatibility
  dt-bindings: clock: mpfs-clkcfg: Add PIC64GX compatibility
  dt-bindings: dma: sifive pdma: Add PIC64GX to compatibles
  dt-bindings: i2c: microchip: corei2c: Add PIC64GX as compatible with
    driver
  dt-bindings: mmc: cdns: document Microchip PIC64GX MMC/SDHCI
    controller
  dt-bindings: net: cdns,macb: Add PIC64GX compatibility
  dt-bindings: rtc: mfps-rtc: Add PIC64GX compatibility
  dt-bindings: soc: microchip: mpfs-sys-controller: Add PIC64GX
    compatibility
  dt-bindings: riscv: microchip: document the PIC64GX curiosity kit
  dt-bindings: mmc: cdns,sdhci: ref sdhci-common.yaml
  dt-bindings: timer: sifive,clint: add PIC64GX compatibility
  dt-bindings: interrupt-controller: sifive,plic: Add PIC64GX
    compatibility
  riscv: dts: microchip: add PIC64GX Curiosity Kit dts
  riscv: dts: microchip: remove POLARFIRE mention in Makefile

 .../bindings/cache/sifive,ccache0.yaml        |   6 +
 .../bindings/clock/microchip,mpfs-ccc.yaml    |   6 +-
 .../bindings/clock/microchip,mpfs-clkcfg.yaml |   6 +-
 .../bindings/dma/sifive,fu540-c000-pdma.yaml  |  15 +-
 .../bindings/gpio/microchip,mpfs-gpio.yaml    |  15 +-
 .../bindings/i2c/microchip,corei2c.yaml       |   4 +-
 .../sifive,plic-1.0.0.yaml                    |   1 +
 .../mailbox/microchip,mpfs-mailbox.yaml       |   6 +-
 .../devicetree/bindings/mmc/cdns,sdhci.yaml   |   3 +-
 .../bindings/net/can/microchip,mpfs-can.yaml  |   6 +-
 .../devicetree/bindings/net/cdns,macb.yaml    |   5 +-
 .../devicetree/bindings/riscv/microchip.yaml  |   7 +-
 .../bindings/rtc/microchip,mfps-rtc.yaml      |   7 +-
 .../microchip,mpfs-sys-controller.yaml        |   6 +-
 .../bindings/spi/microchip,mpfs-spi.yaml      |   7 +-
 .../bindings/timer/sifive,clint.yaml          |   1 +
 .../bindings/usb/microchip,mpfs-musb.yaml     |   7 +-
 arch/riscv/boot/dts/microchip/Makefile        |  13 +-
 .../dts/microchip/pic64gx-curiosity-kit.dts   | 114 ++++
 arch/riscv/boot/dts/microchip/pic64gx.dtsi    | 616 ++++++++++++++++++
 20 files changed, 820 insertions(+), 31 deletions(-)
 create mode 100644 arch/riscv/boot/dts/microchip/pic64gx-curiosity-kit.dts
 create mode 100644 arch/riscv/boot/dts/microchip/pic64gx.dtsi


base-commit: 98f7e32f20d28ec452afb208f9cffc08448a2652

Comments

Conor Dooley Sept. 30, 2024, 2:03 p.m. UTC | #1

On Mon, Sep 30, 2024 at 10:54:29AM +0100, [e-mail] wrote:
> From: Pierre-Henry Moussay <[e-mail]>
> 
> Changes since v1:
> - Limit sdhci to HS (High Speed, 50MHz at 3.3V) mode max
> - Fix I2C dt-bindings, remove microchip,mpfs-i2c fallback
> - remove duplicated pic64gx-clock.h
> - Update Microchip dts Makefile
> - Update PIC64GX dts and dtsi (fix model, sort node)
> - Remove microchip,pic64gx-clock.h present in previous patchset
> - Reword commits messages
> 
> Hi all,
> 
> This V2 patchset is incomplete and doesn't address all the
> comments from the V1 patchset. More precisely the request on the following
> commit have not been addressed:
> [PATCH 08/17] dt-bindings: clock: mpfs-clkcfg: Add PIC64GX compatibility
> This will be fix in a V3 coming in due time.

It's not really clear from this comment that there are other problems
that were in the v1 that have remained in the v2 - the mailbox and
system controller feedback that I gave on v1. I've pointed all three out
again here against the relevant patches, and will hopefully have a
non-RFC implementation of what I want the pic64gx based on w.r.t
clock/mailbox sent this week.

Cheers,
Conor.

Vinod Koul Oct. 22, 2024, 5:33 a.m. UTC | #2

On Mon, 30 Sep 2024 10:54:29 +0100, [e-mail] wrote:
> Changes since v1:
> - Limit sdhci to HS (High Speed, 50MHz at 3.3V) mode max
> - Fix I2C dt-bindings, remove microchip,mpfs-i2c fallback
> - remove duplicated pic64gx-clock.h
> - Update Microchip dts Makefile
> - Update PIC64GX dts and dtsi (fix model, sort node)
> - Remove microchip,pic64gx-clock.h present in previous patchset
> - Reword commits messages
> 
> [...]

Applied, thanks!

[09/20] dt-bindings: dma: sifive pdma: Add PIC64GX to compatibles
        commit: 7655ec4d0de0a822364ecdeec239a2562fa9d96f

Best regards,