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[0/1] RISC-V Devicetrees fix for Sophgo/SG2042 v6.8-rc1

Message ID cover.1706259884.git.unicorn_wang@outlook.com (mailing list archive)
Headers show
Series RISC-V Devicetrees fix for Sophgo/SG2042 v6.8-rc1 | expand

Message

Chen Wang Jan. 26, 2024, 9:19 a.m. UTC 
From: Chen Wang <unicorn_wang@outlook.com>

Hey Arnd,

Please pull one DT fix for Sophgo SG2042 based off v6.8-rc1. 

Thanks,
Chen

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This patch is [2/2] of [1]. The binding part [2] has been merged in v6.8-rc1, but
the dt patch [3] is missed. This fix add the dt patch.

Link: https://lore.kernel.org/all/IA1PR20MB4953C912FC58C0D248976564BB86A@IA1PR20MB4953.namprd20.prod.outlook.com/ [1]
Link: https://lore.kernel.org/all/09b2fc2f-dde9-4f43-9704-d8053bfc85cf@linaro.org/ [2]
Link: https://lore.kernel.org/all/IA1PR20MB4953669C097D9C9E24B549FFBB86A@IA1PR20MB4953.namprd20.prod.outlook.com/ [3]

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Inochi Amaoto (1):
  riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint
    format

 arch/riscv/boot/dts/sophgo/sg2042.dtsi | 80 +++++++++++++++-----------
 1 file changed, 48 insertions(+), 32 deletions(-)


base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d