Show patches with: Submitter = Christoph Hellwig       |    State = Action Required       |   406 patches
« 1 2 3 4 … 4 5 »
Patch Series A/R/T S/W/F Date Submitter Delegate State
[03/15] riscv: abstract out CSR names for supervisor vs machine mode [01/15] riscv: cleanup <asm/bug.h> - 3 - --- 2019-10-17 Christoph Hellwig New
[02/15] riscv: cleanup do_trap_break [01/15] riscv: cleanup <asm/bug.h> - 1 - --- 2019-10-17 Christoph Hellwig New
[01/15] riscv: cleanup <asm/bug.h> [01/15] riscv: cleanup <asm/bug.h> - 1 - --- 2019-10-17 Christoph Hellwig New
serial/sifive: select SERIAL_EARLYCON serial/sifive: select SERIAL_EARLYCON - 1 - --- 2019-09-10 Christoph Hellwig New
[20/20] riscv: disable the EFI PECOFF header for M-mode [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-09-03 Christoph Hellwig New
[19/20] riscv: provide a flat image loader [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-09-03 Christoph Hellwig New
[18/20] riscv: add nommu support [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-09-03 Christoph Hellwig New
[17/20] riscv: clear the instruction cache and all registers when booting [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-09-03 Christoph Hellwig New
[16/20] riscv: use the correct interrupt levels for M-mode [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-09-03 Christoph Hellwig New
[15/20] riscv: read the hart ID from mhartid on boot [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-09-03 Christoph Hellwig New
[14/20] riscv: provide native clint access for M-mode [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-09-03 Christoph Hellwig New
[13/20] riscv: add support for MMIO access to the timer registers [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-09-03 Christoph Hellwig New
[12/20] riscv: implement remote sfence.i using IPIs [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-09-03 Christoph Hellwig New
[11/20] riscv: cleanup the default power off implementation [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-09-03 Christoph Hellwig New
[10/20] riscv: poison SBI calls for M-mode [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-09-03 Christoph Hellwig New
[09/20] riscv: don't allow selecting SBI based drivers for M-mode [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-09-03 Christoph Hellwig New
[08/20] riscv: abstract out CSR names for supervisor vs machine mode [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-09-03 Christoph Hellwig New
[07/20] riscv: move the TLB flush logic out of line [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-09-03 Christoph Hellwig New
[06/20] riscv: don't use the rdtime(h) pseudo-instructions [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-09-03 Christoph Hellwig New
[05/20] riscv: cleanup riscv_cpuid_to_hartid_mask [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-09-03 Christoph Hellwig New
[04/20] riscv: optimize send_ipi_single [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-09-03 Christoph Hellwig New
[03/20] riscv: cleanup send_ipi_mask [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-09-03 Christoph Hellwig New
[02/20] riscv: refactor the IPI code [01/20] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-09-03 Christoph Hellwig New
[01/20] irqchip/sifive-plic: set max threshold for ignored handlers [01/20] irqchip/sifive-plic: set max threshold for ignored handlers 1 - - --- 2019-09-03 Christoph Hellwig New
[8/8] riscv: ignore the SYS_RISCV_FLUSH_ICACHE_LOCAL flag [1/8] riscv: fix the flags argument type for riscv_riscv_flush_icache - - - --- 2019-08-22 Christoph Hellwig New
[7/8] riscv: improve the local flushing logic in sys_riscv_flush_icache [1/8] riscv: fix the flags argument type for riscv_riscv_flush_icache - 1 - --- 2019-08-22 Christoph Hellwig New
[6/8] riscv: use get_cpu and put_cpu in sys_riscv_flush_icache [1/8] riscv: fix the flags argument type for riscv_riscv_flush_icache - 1 - --- 2019-08-22 Christoph Hellwig New
[5/8] riscv: actually clear icache_stale_mask for all harts in mm_cpumask [1/8] riscv: fix the flags argument type for riscv_riscv_flush_icache - 1 - --- 2019-08-22 Christoph Hellwig New
[4/8] riscv: remove the active_mm check in sys_riscv_flush_icache [1/8] riscv: fix the flags argument type for riscv_riscv_flush_icache - - - --- 2019-08-22 Christoph Hellwig New
[3/8] riscv: move sys_riscv_flush_icache to cacheflush.c [1/8] riscv: fix the flags argument type for riscv_riscv_flush_icache - - - --- 2019-08-22 Christoph Hellwig New
[2/8] riscv: remove SYS_RISCV_FLUSH_ICACHE_LOCAL #define [1/8] riscv: fix the flags argument type for riscv_riscv_flush_icache - - - --- 2019-08-22 Christoph Hellwig New
[1/8] riscv: fix the flags argument type for riscv_riscv_flush_icache [1/8] riscv: fix the flags argument type for riscv_riscv_flush_icache - - - --- 2019-08-22 Christoph Hellwig New
[6/6] riscv: move the TLB flush logic out of line [1/6] riscv: refactor the IPI code - 2 - --- 2019-08-21 Christoph Hellwig New
[5/6] riscv: don't use the rdtime(h) pseudo-instructions [1/6] riscv: refactor the IPI code - 1 - --- 2019-08-21 Christoph Hellwig New
[4/6] riscv: cleanup riscv_cpuid_to_hartid_mask [1/6] riscv: refactor the IPI code - 1 - --- 2019-08-21 Christoph Hellwig New
[3/6] riscv: optimize send_ipi_single [1/6] riscv: refactor the IPI code - 2 - --- 2019-08-21 Christoph Hellwig New
[2/6] riscv: cleanup send_ipi_mask [1/6] riscv: refactor the IPI code - 1 - --- 2019-08-21 Christoph Hellwig New
[1/6] riscv: refactor the IPI code [1/6] riscv: refactor the IPI code - 1 - --- 2019-08-21 Christoph Hellwig New
riscv: move sifive_l2_cache.c to drivers/soc riscv: move sifive_l2_cache.c to drivers/soc - 1 - --- 2019-08-18 Christoph Hellwig New
[26/26] nds32: use generic ioremap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[25/26] csky: use generic ioremap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[24/26] riscv: use the generic ioremap code [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached 1 1 1 --- 2019-08-17 Christoph Hellwig New
[23/26] lib: provide a simple generic ioremap implementation [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[22/26] sh: remove __iounmap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[21/26] nios2: remove __iounmap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[20/26] hexagon: remove __iounmap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[19/26] arm64: remove __iounmap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached 1 - - --- 2019-08-17 Christoph Hellwig New
[18/26] m68k: rename __iounmap and mark it static [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[17/26] arch: rely on asm-generic/io.h for default ioremap_* definitions [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached 1 1 1 --- 2019-08-17 Christoph Hellwig New
[16/26] asm-generic: don't provide ioremap for CONFIG_MMU [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[15/26] asm-generic: ioremap_uc should behave the same with and without MMU [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - 1 1 --- 2019-08-17 Christoph Hellwig New
[14/26] asm-generic: don't provide __ioremap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached 1 1 1 --- 2019-08-17 Christoph Hellwig New
[13/26] xtensa: clean up ioremap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[12/26] x86: clean up ioremap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached 1 - - --- 2019-08-17 Christoph Hellwig New
[11/26] parisc: remove __ioremap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[10/26] nios2: remove __ioremap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[09/26] alpha: remove the unused __ioremap wrapper [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[08/26] m68k: simplify ioremap_nocache [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached 1 - - --- 2019-08-17 Christoph Hellwig New
[07/26] hexagon: clean up ioremap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[06/26] ia64: rename ioremap_nocache to ioremap_uc [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[05/26] openrisc: map as uncached in ioremap [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached 1 - - --- 2019-08-17 Christoph Hellwig New
[04/26] mips: remove ioremap_cachable [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached 1 - - --- 2019-08-17 Christoph Hellwig New
[03/26] m68k, microblaze: remove ioremap_fullcache [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached 2 - - --- 2019-08-17 Christoph Hellwig New
[02/26] arm, unicore32: remove ioremap_cached [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached - - - --- 2019-08-17 Christoph Hellwig New
[15/15] riscv: disable the EFI PECOFF header for M-mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[14/15] riscv: add nommu support [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[13/15] riscv: clear the instruction cache and all registers when booting [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[12/15] riscv: use the correct interrupt levels for M-mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[11/15] riscv: don't allow selecting SBI-based drivers for M-mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[10/15] riscv: poison SBI calls for M-mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[09/15] riscv: implement remote sfence.i natively for M-mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[08/15] riscv: provide native clint access for M-mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[07/15] riscv: read the hart ID from mhartid on boot [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[06/15] riscv: provide a flat entry loader [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[05/15] riscv: improve the default power off implementation [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[04/15] riscv: abstract out CSR names for supervisor vs machine mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[03/15] riscv: refactor the IPI code [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[02/15] riscv: use CSR_SATP instead of the legacy sptbr name in switch_mm [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[01/15] irqchip/sifive-plic: set max threshold for ignored handlers [01/15] irqchip/sifive-plic: set max threshold for ignored handlers 1 - - --- 2019-08-13 Christoph Hellwig New
riscv: move sifive_l2_cache.c to drivers/misc riscv: move sifive_l2_cache.c to drivers/misc - - - --- 2019-08-07 Christoph Hellwig New
[3/3] mm: stub out all of swapops.h for !CONFIG_MMU [1/3] mm: fix the MAP_UNINITIALIZED flag - - - --- 2019-07-03 Christoph Hellwig New
[2/3] mm: provide a print_vma_addr stub for !CONFIG_MMU [1/3] mm: fix the MAP_UNINITIALIZED flag - 1 - --- 2019-07-03 Christoph Hellwig New
[1/3] mm: fix the MAP_UNINITIALIZED flag [1/3] mm: fix the MAP_UNINITIALIZED flag - 1 - --- 2019-07-03 Christoph Hellwig New
[17/17] riscv: add nommu support [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - - - --- 2019-06-24 Christoph Hellwig New
[16/17] riscv: clear the instruction cache and all registers when booting [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - - - --- 2019-06-24 Christoph Hellwig New
[15/17] riscv: use the correct interrupt levels for M-mode [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - - - --- 2019-06-24 Christoph Hellwig New
[14/17] riscv: don't allow selecting SBI-based drivers for M-mode [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - - - --- 2019-06-24 Christoph Hellwig New
[13/17] riscv: poison SBI calls for M-mode [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - - - --- 2019-06-24 Christoph Hellwig New
[12/17] riscv: implement remote sfence.i natively for M-mode [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - - - --- 2019-06-24 Christoph Hellwig New
[11/17] riscv: provide native clint access for M-mode [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - - - --- 2019-06-24 Christoph Hellwig New
[10/17] riscv: read the hart ID from mhartid on boot [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - 1 - --- 2019-06-24 Christoph Hellwig New
[09/17] riscv: provide a flat entry loader [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - - - --- 2019-06-24 Christoph Hellwig New
[08/17] riscv: improve the default power off implementation [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - 1 - --- 2019-06-24 Christoph Hellwig New
[07/17] riscv: abstract out CSR names for supervisor vs machine mode [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - 1 - --- 2019-06-24 Christoph Hellwig New
[06/17] riscv: refactor the IPI code [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - - - --- 2019-06-24 Christoph Hellwig New
[05/17] riscv: use CSR_SATP instead of the legacy sptbr name in switch_mm [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - 1 - --- 2019-06-24 Christoph Hellwig New
[04/17] irqchip/sifive-plic: set max threshold for ignored handlers [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - - - --- 2019-06-24 Christoph Hellwig New
[03/17] mm/nommu: fix the MAP_UNINITIALIZED flag [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - 1 - --- 2019-06-24 Christoph Hellwig New
[02/17] mm: stub out all of swapops.h for !CONFIG_MMU [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU - - - --- 2019-06-24 Christoph Hellwig New
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