Show patches with: Series = [01/15] irqchip/sifive-plic: set max threshold for ignored handlers       |    State = Action Required       |   15 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[15/15] riscv: disable the EFI PECOFF header for M-mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[14/15] riscv: add nommu support [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[13/15] riscv: clear the instruction cache and all registers when booting [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[12/15] riscv: use the correct interrupt levels for M-mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[11/15] riscv: don't allow selecting SBI-based drivers for M-mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[10/15] riscv: poison SBI calls for M-mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[09/15] riscv: implement remote sfence.i natively for M-mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[08/15] riscv: provide native clint access for M-mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[07/15] riscv: read the hart ID from mhartid on boot [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[06/15] riscv: provide a flat entry loader [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[05/15] riscv: improve the default power off implementation [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[04/15] riscv: abstract out CSR names for supervisor vs machine mode [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[03/15] riscv: refactor the IPI code [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - - - --- 2019-08-13 Christoph Hellwig New
[02/15] riscv: use CSR_SATP instead of the legacy sptbr name in switch_mm [01/15] irqchip/sifive-plic: set max threshold for ignored handlers - 1 - --- 2019-08-13 Christoph Hellwig New
[01/15] irqchip/sifive-plic: set max threshold for ignored handlers [01/15] irqchip/sifive-plic: set max threshold for ignored handlers 1 - - --- 2019-08-13 Christoph Hellwig New