Show patches with: Submitter = WangYuli       |    Archived = No       |   20 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[RESEND.,v2] riscv: Use '%u' to format the output of 'cpu' [RESEND.,v2] riscv: Use '%u' to format the output of 'cpu' - 1 1 13-- 2024-10-17 WangYuli Accepted
[RESEND.,v2] riscv: Use '%u' to format the output of 'cpu' [RESEND.,v2] riscv: Use '%u' to format the output of 'cpu' - 1 1 13-- 2024-09-26 WangYuli Superseded
[RESEND.,v2] riscv: Use '%u' to format the output of 'cpu' [RESEND.,v2] riscv: Use '%u' to format the output of 'cpu' - 1 1 13-- 2024-09-19 WangYuli Superseded
[6.6,v3] riscv: dts: starfive: add assigned-clock* to limit frquency [6.6,v3] riscv: dts: starfive: add assigned-clock* to limit frquency - 1 - --1 2024-09-16 WangYuli Handled Elsewhere
[v2] riscv: Use '%u' to format the output of 'cpu' [v2] riscv: Use '%u' to format the output of 'cpu' - 1 1 13-- 2024-09-13 WangYuli Superseded
[RESEND.] riscv: Use '%u' to format the output of 'cpu' [RESEND.] riscv: Use '%u' to format the output of 'cpu' - 1 1 13-- 2024-09-12 WangYuli Superseded
[6.6,v2,4/4] riscv: dts: starfive: Add JH7110 PWM-DAC support [6.6,v2,1/4] riscv: dts: starfive: add assigned-clock* to limit frquency - 1 - --1 2024-09-12 WangYuli Superseded
[6.6,v2,3/4] riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1 [6.6,v2,1/4] riscv: dts: starfive: add assigned-clock* to limit frquency - 1 - --1 2024-09-12 WangYuli Superseded
[6.6,v2,2/4] riscv: dts: starfive: pinfunc: Fix the pins name of I2STX1 [6.6,v2,1/4] riscv: dts: starfive: add assigned-clock* to limit frquency 1 1 - --1 2024-09-12 WangYuli Superseded
[6.6,v2,1/4] riscv: dts: starfive: add assigned-clock* to limit frquency [6.6,v2,1/4] riscv: dts: starfive: add assigned-clock* to limit frquency - 1 - --1 2024-09-12 WangYuli Superseded
[6.6,4/4] riscv: dts: starfive: Add JH7110 PWM-DAC support [6.6,1/4] riscv: dts: starfive: add assigned-clock* to limit frquency - 1 - --1 2024-09-09 WangYuli Superseded
[6.6,3/4] riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1 [6.6,1/4] riscv: dts: starfive: add assigned-clock* to limit frquency - 1 - --1 2024-09-09 WangYuli Superseded
[6.6,2/4] riscv: dts: starfive: pinfunc: Fix the pins name of I2STX1 [6.6,1/4] riscv: dts: starfive: add assigned-clock* to limit frquency 1 1 - --1 2024-09-09 WangYuli Superseded
[6.6,1/4] riscv: dts: starfive: add assigned-clock* to limit frquency [6.6,1/4] riscv: dts: starfive: add assigned-clock* to limit frquency - 1 - --1 2024-09-09 WangYuli Superseded
[6.6] membarrier: riscv: Add full memory barrier in switch_mm() [6.6] membarrier: riscv: Add full memory barrier in switch_mm() - 1 - --1 2024-09-09 WangYuli Handled Elsewhere
riscv: Use '%u' to format the output of 'cpu' riscv: Use '%u' to format the output of 'cpu' - - - 14-- 2024-09-06 WangYuli Superseded
[6.6,4/4] riscv: Use accessors to page table entries instead of direct dereference [6.6,1/4] riscv: Use WRITE_ONCE() when setting page table entries 1 - - --1 2024-09-06 WangYuli Handled Elsewhere
[6.6,3/4] riscv: mm: Only compile pgtable.c if MMU [6.6,1/4] riscv: Use WRITE_ONCE() when setting page table entries - - - --1 2024-09-06 WangYuli Handled Elsewhere
[6.6,2/4] mm: Introduce pudp/p4dp/pgdp_get() functions [6.6,1/4] riscv: Use WRITE_ONCE() when setting page table entries - - - --1 2024-09-06 WangYuli Handled Elsewhere
[6.6,1/4] riscv: Use WRITE_ONCE() when setting page table entries [6.6,1/4] riscv: Use WRITE_ONCE() when setting page table entries - - - --1 2024-09-06 WangYuli Handled Elsewhere