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RISC-V: Avoid using invalid intermediate translations

Message ID 20190618061203.7256-1-palmer@sifive.com (mailing list archive)
State New, archived
Headers show
Series RISC-V: Avoid using invalid intermediate translations | expand

Commit Message

Palmer Dabbelt June 18, 2019, 6:12 a.m. UTC 
This is almost entirely a comment.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
 arch/riscv/kernel/head.S | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)
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Patch

diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index fe884cd69abd..fc5534e9cf4b 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -99,7 +99,9 @@  relocate:
 
 	/*
 	 * Load trampoline page directory, which will cause us to trap to
-	 * stvec if VA != PA, or simply fall through if VA == PA
+	 * stvec if VA != PA, or simply fall through if VA == PA.  We need a
+	 * full fence here because setup_vm() just wrote these PTEs and we need
+	 * to ensure the new translations are in use.
 	 */
 	la a0, trampoline_pg_dir
 	srl a0, a0, PAGE_SHIFT
@@ -118,8 +120,14 @@  relocate:
 	la gp, __global_pointer$
 .option pop
 
-	/* Switch to kernel page tables */
+	/*
+	 * Switch to kernel page tables.  A full fence is necessary in order to
+	 * avoid using the trampoline translations, which are only correct for
+	 * the first superpage.  Fetching the fence is guarnteed to work
+	 * because that first superpage is translated the same way.
+	 */
 	csrw sptbr, a2
+	sfence.vma
 
 	ret