[11/15] riscv: don't allow selecting SBI-based drivers for M-mode

From: Damien Le Moal <damien.lemoal@wdc.com>

From: Christoph Hellwig <hch@lst.de>
To: Palmer Dabbelt <palmer@sifive.com>,
 Paul Walmsley <paul.walmsley@sifive.com>
Subject: [PATCH 11/15] riscv: don't allow selecting SBI-based drivers for
 M-mode
Date: Tue, 13 Aug 2019 17:47:43 +0200
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Message ID	20190813154747.24256-12-hch@lst.de (mailing list archive)
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Headers	show Return-Path: <linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org> From: Christoph Hellwig <hch@lst.de> To: Palmer Dabbelt <palmer@sifive.com>, Paul Walmsley <paul.walmsley@sifive.com> Subject: [PATCH 11/15] riscv: don't allow selecting SBI-based drivers for M-mode Date: Tue, 13 Aug 2019 17:47:43 +0200 Message-Id: <20190813154747.24256-12-hch@lst.de> In-Reply-To: <20190813154747.24256-1-hch@lst.de> References: <20190813154747.24256-1-hch@lst.de> MIME-Version: 1.0 Precedence: list Cc: Damien Le Moal <damien.lemoal@wdc.com>, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org
Series	[01/15] irqchip/sifive-plic: set max threshold for ignored handlers \| expand [01/15] irqchip/sifive-plic: set max threshold for ignored handlers [02/15] riscv: use CSR_SATP instead of the legacy sptbr name in switch_mm [03/15] riscv: refactor the IPI code [04/15] riscv: abstract out CSR names for supervisor vs machine mode [05/15] riscv: improve the default power off implementation [06/15] riscv: provide a flat entry loader [07/15] riscv: read the hart ID from mhartid on boot [08/15] riscv: provide native clint access for M-mode [09/15] riscv: implement remote sfence.i natively for M-mode [10/15] riscv: poison SBI calls for M-mode [11/15] riscv: don't allow selecting SBI-based drivers for M-mode [12/15] riscv: use the correct interrupt levels for M-mode [13/15] riscv: clear the instruction cache and all registers when booting [14/15] riscv: add nommu support [15/15] riscv: disable the EFI PECOFF header for M-mode

[11/15] riscv: don't allow selecting SBI-based drivers for M-mode

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