[bpf-next,v2,9/9] riscv, perf: add arch specific perf_arch_bpf_user_pt_regs

Message ID	20191216091343.23260-10-bjorn.topel@gmail.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <SRS0=8121=2G=lists.infradead.org=linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@kernel.org> DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D0890207FF From: =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= <bjorn.topel@gmail.com> To: daniel@iogearbox.net, ast@kernel.org, netdev@vger.kernel.org Subject: [PATCH bpf-next v2 9/9] riscv, perf: add arch specific perf_arch_bpf_user_pt_regs Date: Mon, 16 Dec 2019 10:13:43 +0100 Message-Id: <20191216091343.23260-10-bjorn.topel@gmail.com> In-Reply-To: <20191216091343.23260-1-bjorn.topel@gmail.com> References: <20191216091343.23260-1-bjorn.topel@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:444 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (bjorn.topel[at]gmail.com) 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain Precedence: list Cc: =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= <bjorn.topel@gmail.com>, linux-riscv@lists.infradead.org, bpf@vger.kernel.org Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org
Series	riscv: BPF JIT fix, optimizations and far jumps support \| expand [bpf-next,v2,0/9] riscv: BPF JIT fix, optimizations and far jumps support [bpf-next,v2,1/9] riscv, bpf: fix broken BPF tail calls [bpf-next,v2,2/9] riscv, bpf: add support for far branching [bpf-next,v2,3/9] riscv, bpf: add support for far branching when emitting tail call [bpf-next,v2,4/9] riscv, bpf: add support for far jumps and exits [bpf-next,v2,5/9] riscv, bpf: optimize BPF tail calls [bpf-next,v2,6/9] riscv, bpf: provide RISC-V specific JIT image alloc/free [bpf-next,v2,7/9] riscv, bpf: optimize calls [bpf-next,v2,8/9] riscv, bpf: add missing uapi header for BPF_PROG_TYPE_PERF_EVENT programs [bpf-next,v2,9/9] riscv, perf: add arch specific perf_arch_bpf_user_pt_regs

Message ID

20191216091343.23260-10-bjorn.topel@gmail.com (mailing list archive)

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From: =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= <bjorn.topel@gmail.com>
To: daniel@iogearbox.net,
	ast@kernel.org,
	netdev@vger.kernel.org
Subject: [PATCH bpf-next v2 9/9] riscv,
 perf: add arch specific perf_arch_bpf_user_pt_regs
Date: Mon, 16 Dec 2019 10:13:43 +0100
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Series

riscv: BPF JIT fix, optimizations and far jumps support | expand

RISC-V was missing a proper perf_arch_bpf_user_pt_regs macro for CONFIG_PERF_EVENT builds. Signed-off-by: Björn Töpel <bjorn.topel@gmail.com> --- arch/riscv/include/asm/perf_event.h | 4 ++++ 1 file changed, 4 insertions(+)

Comments

Palmer Dabbelt Dec. 23, 2019, 6:58 p.m. UTC | #1

On Mon, 16 Dec 2019 01:13:43 PST (-0800), Bjorn Topel wrote:
> RISC-V was missing a proper perf_arch_bpf_user_pt_regs macro for
> CONFIG_PERF_EVENT builds.
>
> Signed-off-by: Björn Töpel <bjorn.topel@gmail.com>
> ---
>  arch/riscv/include/asm/perf_event.h | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/arch/riscv/include/asm/perf_event.h b/arch/riscv/include/asm/perf_event.h
> index aefbfaa6a781..0234048b12bc 100644
> --- a/arch/riscv/include/asm/perf_event.h
> +++ b/arch/riscv/include/asm/perf_event.h
> @@ -82,4 +82,8 @@ struct riscv_pmu {
>  	int		irq;
>  };
>
> +#ifdef CONFIG_PERF_EVENTS
> +#define perf_arch_bpf_user_pt_regs(regs) (struct user_regs_struct *)regs
> +#endif
> +
>  #endif /* _ASM_RISCV_PERF_EVENT_H */

Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>

diff --git a/arch/riscv/include/asm/perf_event.h b/arch/riscv/include/asm/perf_event.h
index aefbfaa6a781..0234048b12bc 100644
--- a/arch/riscv/include/asm/perf_event.h
+++ b/arch/riscv/include/asm/perf_event.h
@@ -82,4 +82,8 @@  struct riscv_pmu {
 	int		irq;
 };
 
+#ifdef CONFIG_PERF_EVENTS
+#define perf_arch_bpf_user_pt_regs(regs) (struct user_regs_struct *)regs
+#endif
+
 #endif /* _ASM_RISCV_PERF_EVENT_H */

[bpf-next,v2,9/9] riscv, perf: add arch specific perf_arch_bpf_user_pt_regs

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