Message ID | 20200102041445.98195-2-zong.li@sifive.com (mailing list archive) |
---|---|
State | Accepted, archived |
Headers | show
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[220.132.236.182]) by smtp.gmail.com with ESMTPSA id i127sm63870336pfc.55.2020.01.01.20.14.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jan 2020 20:14:51 -0800 (PST) From: Zong Li <zong.li@sifive.com> To: corbet@lwn.net, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, anup@brainfault.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH 1/2] riscv: gcov: enable gcov for RISC-V Date: Thu, 2 Jan 2020 12:14:44 +0800 Message-Id: <20200102041445.98195-2-zong.li@sifive.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200102041445.98195-1-zong.li@sifive.com> References: <20200102041445.98195-1-zong.li@sifive.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200101_201452_334292_82D2D11B X-CRM114-Status: UNSURE ( 7.34 ) X-CRM114-Notice: Please train this message. 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Series |
Enable gcov for RISC-V
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expand
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diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index d8efbaa78d67..a31169b02ec0 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -64,6 +64,7 @@ config RISCV select SPARSEMEM_STATIC if 32BIT select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU select HAVE_ARCH_MMAP_RND_BITS if MMU + select ARCH_HAS_GCOV_PROFILE_ALL config ARCH_MMAP_RND_BITS_MIN default 18 if 64BIT