[2/2] Documentation/features: support gcov on RISC-V

Message ID	20200102041445.98195-3-zong.li@sifive.com (mailing list archive)
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Headers	show Return-Path: <SRS0=bEaw=2X=lists.infradead.org=linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@kernel.org> DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0DCBF21734 From: Zong Li <zong.li@sifive.com> To: corbet@lwn.net, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, anup@brainfault.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH 2/2] Documentation/features: support gcov on RISC-V Date: Thu, 2 Jan 2020 12:14:45 +0800 Message-Id: <20200102041445.98195-3-zong.li@sifive.com> In-Reply-To: <20200102041445.98195-1-zong.li@sifive.com> References: <20200102041445.98195-1-zong.li@sifive.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Precedence: list Cc: Zong Li <zong.li@sifive.com> Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org
Series	Enable gcov for RISC-V \| expand [v2,0/2] Enable gcov for RISC-V [1/2] riscv: gcov: enable gcov for RISC-V [2/2] Documentation/features: support gcov on RISC-V

Message ID

20200102041445.98195-3-zong.li@sifive.com (mailing list archive)

State

Accepted, archived

Headers

DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0DCBF21734
From: Zong Li <zong.li@sifive.com>
To: corbet@lwn.net, paul.walmsley@sifive.com, palmer@dabbelt.com,
 aou@eecs.berkeley.edu, anup@brainfault.org, linux-doc@vger.kernel.org,
 linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: [PATCH 2/2] Documentation/features: support gcov on RISC-V
Date: Thu,  2 Jan 2020 12:14:45 +0800
Message-Id: <20200102041445.98195-3-zong.li@sifive.com>
In-Reply-To: <20200102041445.98195-1-zong.li@sifive.com>
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Series

Enable gcov for RISC-V | expand

Commit Message

Zong Li Jan. 2, 2020, 4:14 a.m. UTC

Change status to "ok" for RISC-V architecture.
Lightly tested on QEMU and Hifive Unleashed board, seems to work as
expected.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Documentation/features/debug/gcov-profile-all/arch-support.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/features/debug/gcov-profile-all/arch-support.txt b/Documentation/features/debug/gcov-profile-all/arch-support.txt
index 059d58a549c7..6fb2b0671994 100644
--- a/Documentation/features/debug/gcov-profile-all/arch-support.txt
+++ b/Documentation/features/debug/gcov-profile-all/arch-support.txt
@@ -23,7 +23,7 @@ 
     |    openrisc: | TODO |
     |      parisc: | TODO |
     |     powerpc: |  ok  |
-    |       riscv: | TODO |
+    |       riscv: |  ok  |
     |        s390: |  ok  |
     |          sh: |  ok  |
     |       sparc: | TODO |

[2/2] Documentation/features: support gcov on RISC-V

Commit Message

Patch