Message ID | 20200226220213.27423-10-atish.patra@wdc.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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26 Feb 2020 13:54:50 -0800 IronPort-SDR: cwWbOHXlgS187vh61TxRjM6guQ7ekDTpm98OcXyDB2OGhAdfCG+xrfniT9NPggwCnklbxc0dB+ +exZW2EhASXPMZntYxbsWCex681LyalY5ySfsrJfMH8QKGwx8ZKJjPCsJNzeC4GEuM3PCwqtGR 3lvXucSrKbzrSKMUsoSNOOVGt1tH0ohUKoTuSp56n5+fS77Zy6NEg2dlcNEdjBTYXJIuX0x/NN PAfilQhS/RXAuTURdERtFBjcHBPsZnc15GBqImlUTZ5K1hupUAB6RwniAwb3PI1p/XokGe03el ou8= WDCIronportException: Internal Received: from yoda.sdcorp.global.sandisk.com (HELO yoda.int.fusionio.com) ([10.196.158.80]) by uls-op-cesaip02.wdc.com with ESMTP; 26 Feb 2020 14:02:25 -0800 From: Atish Patra <atish.patra@wdc.com> To: linux-kernel@vger.kernel.org Subject: [PATCH v10 09/12] RISC-V: Add SBI HSM extension definitions Date: Wed, 26 Feb 2020 14:02:10 -0800 Message-Id: <20200226220213.27423-10-atish.patra@wdc.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200226220213.27423-1-atish.patra@wdc.com> References: <20200226220213.27423-1-atish.patra@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200226_140230_472355_DD803BD8 X-CRM114-Status: UNSURE ( 8.42 ) X-CRM114-Notice: Please train this message. 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Wysocki" <rafael.j.wysocki@intel.com>, Daniel Jordan <daniel.m.jordan@oracle.com>, Geert Uytterhoeven <geert@linux-m68k.org>, Greentime Hu <greentime.hu@sifive.com>, Borislav Petkov <bp@suse.de>, Mao Han <han_mao@c-sky.com>, Albert Ou <aou@eecs.berkeley.edu>, Jason Cooper <jason@lakedaemon.net>, Sudeep Holla <sudeep.holla@arm.com>, Alexios Zavras <alexios.zavras@intel.com>, Paul Walmsley <paul.walmsley@sifive.com>, Thomas Gleixner <tglx@linutronix.de>, Nick Hu <nickhu@andestech.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Anup Patel <anup.patel@wdc.com>, Vincent Chen <vincent.chen@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, "Eric W. Biederman" <ebiederm@xmission.com>, Anup Patel <anup@brainfault.org>, Steven Price <steven.price@arm.com> Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org |
Series |
Add support for SBI v0.2 and CPU hotplug
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expand
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diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 82ff88f06ddc..450430c15879 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -26,6 +26,7 @@ enum sbi_ext_id { SBI_EXT_TIME = 0x54494D45, SBI_EXT_IPI = 0x735049, SBI_EXT_RFENCE = 0x52464E43, + SBI_EXT_HSM = 0x48534D, }; enum sbi_ext_base_fid { @@ -56,6 +57,19 @@ enum sbi_ext_rfence_fid { SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID, }; +enum sbi_ext_hsm_fid { + SBI_EXT_HSM_HART_START = 0, + SBI_EXT_HSM_HART_STOP, + SBI_EXT_HSM_HART_STATUS, +}; + +enum sbi_hsm_hart_status { + SBI_HSM_HART_STATUS_STARTED = 0, + SBI_HSM_HART_STATUS_STOPPED, + SBI_HSM_HART_STATUS_START_PENDING, + SBI_HSM_HART_STATUS_STOP_PENDING, +}; + #define SBI_SPEC_VERSION_DEFAULT 0x1 #define SBI_SPEC_VERSION_MAJOR_SHIFT 24 #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f