| Message ID | 20201204085835.2406541-2-atish.patra@wdc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add Microchip PolarFire Soc Support | expand |
Hi Atish, On 12/4/20 8:58 AM, Atish Patra wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Add Microchip PolarFire kconfig option which selects SoC specific > and common drivers that is required for this SoC. > > Signed-off-by: Atish Patra <atish.patra@wdc.com> > Reviewed-by: Bin Meng <bin.meng@windriver.com> > Reviewed-by: Anup Patel <anup@brainfault.org> > --- > arch/riscv/Kconfig.socs | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > index 8a55f6156661..148ab095966b 100644 > --- a/arch/riscv/Kconfig.socs > +++ b/arch/riscv/Kconfig.socs > @@ -1,5 +1,12 @@ > menu "SoC selection" > > +config SOC_MICROCHIP_POLARFIRE > + bool "Microchip PolarFire SoCs" > + select MCHP_CLK_PFSOC Can you change MCHP_CLK_PFSOC to MCHP_CLK_MPFS to align with the v2 clock driver? > + select SIFIVE_PLIC > + help > + This enables support for Microchip PolarFire SoC platforms. > + > config SOC_SIFIVE > bool "SiFive SoCs" > select SERIAL_SIFIVE if TTY > -- > 2.25.1 > Regards, Cyril.
On Thu, Jan 7, 2021 at 3:40 AM <Cyril.Jean@microchip.com> wrote: > > Hi Atish, > > On 12/4/20 8:58 AM, Atish Patra wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > Add Microchip PolarFire kconfig option which selects SoC specific > > and common drivers that is required for this SoC. > > > > Signed-off-by: Atish Patra <atish.patra@wdc.com> > > Reviewed-by: Bin Meng <bin.meng@windriver.com> > > Reviewed-by: Anup Patel <anup@brainfault.org> > > --- > > arch/riscv/Kconfig.socs | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > > index 8a55f6156661..148ab095966b 100644 > > --- a/arch/riscv/Kconfig.socs > > +++ b/arch/riscv/Kconfig.socs > > @@ -1,5 +1,12 @@ > > menu "SoC selection" > > > > +config SOC_MICROCHIP_POLARFIRE > > + bool "Microchip PolarFire SoCs" > > + select MCHP_CLK_PFSOC > Can you change MCHP_CLK_PFSOC to MCHP_CLK_MPFS to align with the v2 > clock driver? Sure. Will do that. > > + select SIFIVE_PLIC > > + help > > + This enables support for Microchip PolarFire SoC platforms. > > + > > config SOC_SIFIVE > > bool "SiFive SoCs" > > select SERIAL_SIFIVE if TTY > > -- > > 2.25.1 > > > Regards, > > Cyril. > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 8a55f6156661..148ab095966b 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -1,5 +1,12 @@ menu "SoC selection" +config SOC_MICROCHIP_POLARFIRE + bool "Microchip PolarFire SoCs" + select MCHP_CLK_PFSOC + select SIFIVE_PLIC + help + This enables support for Microchip PolarFire SoC platforms. + config SOC_SIFIVE bool "SiFive SoCs" select SERIAL_SIFIVE if TTY