Message ID | 20201210140313.258739-12-damien.lemoal@wdc.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | RISC-V Kendryte K210 support improvements | expand |
On Thu, Dec 10, 2020 at 11:03:02PM +0900, Damien Le Moal wrote: > Document the device tree bindings of the Canaan Kendryte K210 SoC > system controller driver in > Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml. > > Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> > --- > .../bindings/mfd/canaan,k210-sysctl.yaml | 116 ++++++++++++++++++ > 1 file changed, 116 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml > > diff --git a/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml b/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml > new file mode 100644 > index 000000000000..a61d8ea4fbec > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml > @@ -0,0 +1,116 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mfd/canaan,k210-sysctl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Canaan Kendryte K210 System Controller Device Tree Bindings > + > +maintainers: > + - Damien Le Moal <damien.lemoal@wdc.com> > + > +description: > + Canaan Inc. Kendryte K210 SoC system controller which provides a > + register map for controlling the clocks, reset signals and pin power > + domains of the SoC. > + > +properties: > + compatible: > + allOf: Don't need 'allOf'. > + - items: > + - const: canaan,k210-sysctl > + - const: syscon > + - const: simple-mfd > + > + clocks: > + description: > + System controller Advanced Power Bus (APB) interface clock source. How many entries? > + > + clock-names: > + maxItems: 1 Don't need maxItems as it is implied by length of 'items'. > + items: > + - const: pclk > + > + reg: > + maxItems: 1 > + description: > + Offset and length of the system controller register space. Drop. That's pretty much the description for all 'reg' entries. > + > + reg-io-width: > + const: 4 Why is this needed if always 4? > + > + clock-controller: > + # Child node > + type: object > + $ref: "../clock/canaan,k210-clk.yaml" > + description: > + Clock controller for the SoC clocks. This child node definition > + should follow the bindings specified in > + Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml. > + > + reset-controller: > + # Child node > + type: object > + $ref: "../reset/canaan,k210-rst.yaml" > + description: > + Reset controller for the SoC. This child node definition > + should follow the bindings specified in > + Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml. > + > + syscon-reboot: > + # Child node > + type: object > + $ref: "../power/reset/syscon-reboot.yaml" > + description: > + Reboot method for the SoC. This child node definition > + should follow the bindings specified in > + Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml. > + > +required: > + - compatible > + - clocks > + - reg > + - clock-controller > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/k210-clk.h> > + #include <dt-bindings/reset/k210-rst.h> > + > + clocks { > + in0: oscllator { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <26000000>; > + }; > + }; > + > + sysctl: syscon@50440000 { > + compatible = "canaan,k210-sysctl", > + "syscon", "simple-mfd"; > + reg = <0x50440000 0x100>; > + reg-io-width = <4>; > + clocks = <&sysclk K210_CLK_APB1>; > + clock-names = "pclk"; > + > + sysclk: clock-controller { > + #clock-cells = <1>; > + compatible = "canaan,k210-clk"; > + clocks = <&in0>; > + }; > + > + sysrst: reset-controller { > + compatible = "canaan,k210-rst"; > + #reset-cells = <1>; > + }; > + > + reboot: syscon-reboot { > + compatible = "syscon-reboot"; > + regmap = <&sysctl>; > + offset = <48>; > + mask = <1>; > + value = <1>; > + }; > + }; > -- > 2.29.2 >
diff --git a/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml b/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml new file mode 100644 index 000000000000..a61d8ea4fbec --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/canaan,k210-sysctl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Canaan Kendryte K210 System Controller Device Tree Bindings + +maintainers: + - Damien Le Moal <damien.lemoal@wdc.com> + +description: + Canaan Inc. Kendryte K210 SoC system controller which provides a + register map for controlling the clocks, reset signals and pin power + domains of the SoC. + +properties: + compatible: + allOf: + - items: + - const: canaan,k210-sysctl + - const: syscon + - const: simple-mfd + + clocks: + description: + System controller Advanced Power Bus (APB) interface clock source. + + clock-names: + maxItems: 1 + items: + - const: pclk + + reg: + maxItems: 1 + description: + Offset and length of the system controller register space. + + reg-io-width: + const: 4 + + clock-controller: + # Child node + type: object + $ref: "../clock/canaan,k210-clk.yaml" + description: + Clock controller for the SoC clocks. This child node definition + should follow the bindings specified in + Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml. + + reset-controller: + # Child node + type: object + $ref: "../reset/canaan,k210-rst.yaml" + description: + Reset controller for the SoC. This child node definition + should follow the bindings specified in + Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml. + + syscon-reboot: + # Child node + type: object + $ref: "../power/reset/syscon-reboot.yaml" + description: + Reboot method for the SoC. This child node definition + should follow the bindings specified in + Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml. + +required: + - compatible + - clocks + - reg + - clock-controller + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/k210-clk.h> + #include <dt-bindings/reset/k210-rst.h> + + clocks { + in0: oscllator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + }; + + sysctl: syscon@50440000 { + compatible = "canaan,k210-sysctl", + "syscon", "simple-mfd"; + reg = <0x50440000 0x100>; + reg-io-width = <4>; + clocks = <&sysclk K210_CLK_APB1>; + clock-names = "pclk"; + + sysclk: clock-controller { + #clock-cells = <1>; + compatible = "canaan,k210-clk"; + clocks = <&in0>; + }; + + sysrst: reset-controller { + compatible = "canaan,k210-rst"; + #reset-cells = <1>; + }; + + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&sysctl>; + offset = <48>; + mask = <1>; + value = <1>; + }; + };
Document the device tree bindings of the Canaan Kendryte K210 SoC system controller driver in Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> --- .../bindings/mfd/canaan,k210-sysctl.yaml | 116 ++++++++++++++++++ 1 file changed, 116 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml