[v6,9/9] MAINTAINERS: Add entry for RISC-V PMU drivers

Message ID	20220219004700.1973682-10-atishp@rivosinc.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org> From: Atish Patra <atishp@rivosinc.com> To: linux-kernel@vger.kernel.org Cc: Atish Patra <atishp@rivosinc.com>, Albert Ou <aou@eecs.berkeley.edu>, Atish Patra <atishp@atishpatra.org>, Anup Patel <anup@brainfault.org>, Damien Le Moal <damien.lemoal@wdc.com>, devicetree@vger.kernel.org, Jisheng Zhang <jszhang@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>, linux-riscv@lists.infradead.org, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Rob Herring <robh+dt@kernel.org> Subject: [v6 9/9] MAINTAINERS: Add entry for RISC-V PMU drivers Date: Fri, 18 Feb 2022 16:47:00 -0800 Message-Id: <20220219004700.1973682-10-atishp@rivosinc.com> In-Reply-To: <20220219004700.1973682-1-atishp@rivosinc.com> References: <20220219004700.1973682-1-atishp@rivosinc.com> MIME-Version: 1.0 Precedence: list Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org
Series	Improve RISC-V Perf support using SBI PMU and sscofpmf extension \| expand [v6,0/9] Improve RISC-V Perf support using SBI PMU and sscofpmf extension [v6,1/9] RISC-V: Remove the current perf implementation [v6,2/9] RISC-V: Add CSR encodings for all HPMCOUNTERS [v6,3/9] RISC-V: Add a perf core library for pmu drivers [v6,4/9] RISC-V: Add a simple platform driver for RISC-V legacy perf [v6,5/9] RISC-V: Add RISC-V SBI PMU extension definitions [v6,6/9] RISC-V: Add perf platform driver based on SBI PMU extension [v6,7/9] RISC-V: Add sscofpmf extension support [v6,8/9] Documentation: riscv: Remove the old documentation [v6,9/9] MAINTAINERS: Add entry for RISC-V PMU drivers

Message ID

20220219004700.1973682-10-atishp@rivosinc.com (mailing list archive)

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New, archived

Headers

From: Atish Patra <atishp@rivosinc.com>
To: linux-kernel@vger.kernel.org
Cc: Atish Patra <atishp@rivosinc.com>, Albert Ou <aou@eecs.berkeley.edu>,
 Atish Patra <atishp@atishpatra.org>, Anup Patel <anup@brainfault.org>,
 Damien Le Moal <damien.lemoal@wdc.com>, devicetree@vger.kernel.org,
 Jisheng Zhang <jszhang@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
 linux-riscv@lists.infradead.org, Palmer Dabbelt <palmer@dabbelt.com>,
 Paul Walmsley <paul.walmsley@sifive.com>, Rob Herring <robh+dt@kernel.org>
Subject: [v6 9/9] MAINTAINERS: Add entry for RISC-V PMU drivers
Date: Fri, 18 Feb 2022 16:47:00 -0800
Message-Id: <20220219004700.1973682-10-atishp@rivosinc.com>
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Series

Improve RISC-V Perf support using SBI PMU and sscofpmf extension | expand

Commit Message

Atish Patra Feb. 19, 2022, 12:47 a.m. UTC

From: Atish Patra <atish.patra@wdc.com>

Add myself and Anup as maintainer for RISC-V PMU drivers.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 MAINTAINERS | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index fca970a46e77..101a07728d5f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16596,6 +16596,15 @@  S:	Maintained
 F:	drivers/mtd/nand/raw/r852.c
 F:	drivers/mtd/nand/raw/r852.h
 
+RISC-V PMU DRIVERS
+M:	Atish Patra <atishp@atishpatra.org>
+R:	Anup Patel <anup@brainfault.org>
+L:	linux-riscv@lists.infradead.org
+S:	Supported
+F:	drivers/perf/riscv_pmu.c
+F:	drivers/perf/riscv_pmu_legacy.c
+F:	drivers/perf/riscv_pmu_sbi.c
+
 RISC-V ARCHITECTURE
 M:	Paul Walmsley <paul.walmsley@sifive.com>
 M:	Palmer Dabbelt <palmer@dabbelt.com>

[v6,9/9] MAINTAINERS: Add entry for RISC-V PMU drivers

Commit Message

Patch