Message ID | 20220420184056.7886-5-palmer@rivosinc.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | RISC-V: Various XIP fixes | expand |
Reviewed-by: Guo Ren <guoren@kernel.org> On Thu, Apr 21, 2022 at 2:48 AM Palmer Dabbelt <palmer@rivosinc.com> wrote: > > From: Palmer Dabbelt <palmer@rivosinc.com> > > A handful of functions unused functions were enabled during XIP builds, > which themselves didn't build correctly. This just disables the > functions entirely. > > Fixes: e8a62cc26ddf ("riscv: Implement sv48 support") > Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> > --- > arch/riscv/mm/init.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c > index 7bc9a21e29fb..d2054a6cd791 100644 > --- a/arch/riscv/mm/init.c > +++ b/arch/riscv/mm/init.c > @@ -660,7 +660,7 @@ static __init pgprot_t pgprot_from_va(uintptr_t va) > } > #endif /* CONFIG_STRICT_KERNEL_RWX */ > > -#ifdef CONFIG_64BIT > +#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL) > static void __init disable_pgtable_l5(void) > { > pgtable_l5_enabled = false; > -- > 2.34.1 >
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index 7bc9a21e29fb..d2054a6cd791 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -660,7 +660,7 @@ static __init pgprot_t pgprot_from_va(uintptr_t va) } #endif /* CONFIG_STRICT_KERNEL_RWX */ -#ifdef CONFIG_64BIT +#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL) static void __init disable_pgtable_l5(void) { pgtable_l5_enabled = false;