| Message ID | 20220501192557.2631936-6-mail@conchuod.ie (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | PolarFire SoC dt for 5.19 | expand |
Am Sonntag, 1. Mai 2022, 21:25:56 CEST schrieb Conor Dooley: > From: Conor Dooley <conor.dooley@microchip.com> > > Currently mpfs-fabric.dtsi is included by mpfs.dtsi - which is fine > currently since there is only one board with this SoC upstream. > > However if another board was added, it would include the fabric contents > of the Icicle Kit's reference design. To avoid this, rename > mpfs-fabric.dtsi to mpfs-icicle-kit-fabric.dtsi & include it in the dts > rather than mpfs.dtsi. > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > .../microchip/{mpfs-fabric.dtsi => mpfs-icicle-kit-fabric.dtsi} | 2 ++ > arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts | 1 + > arch/riscv/boot/dts/microchip/mpfs.dtsi | 1 - > 3 files changed, 3 insertions(+), 1 deletion(-) > rename arch/riscv/boot/dts/microchip/{mpfs-fabric.dtsi => mpfs-icicle-kit-fabric.dtsi} (91%) > > diff --git a/arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi > similarity index 91% > rename from arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi > rename to arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi > index ccaac3371cf9..0d28858b83f2 100644 > --- a/arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi > +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi > @@ -2,6 +2,8 @@ > /* Copyright (c) 2020-2021 Microchip Technology Inc */ > > / { > + compatible = "microchip,mpfs-icicle-reference-rtlv2203", "microchip,mpfs"; > + I don't really understand the meaning of the added compatible yet. It will get overridden by the compatible in the dts and also the fabric dtsi for the polarberry does not contain a similar thing. > core_pwm0: pwm@41000000 { > compatible = "microchip,corepwm-rtl-v4"; > reg = <0x0 0x41000000 0x0 0xF0>; > diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts > index 84b0015dfd47..739dfa52bed1 100644 > --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts > +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts > @@ -4,6 +4,7 @@ > /dts-v1/; > > #include "mpfs.dtsi" > +#include "mpfs-icicle-kit-fabric.dtsi" > > /* Clock frequency (in Hz) of the rtcclk */ > #define RTCCLK_FREQ 1000000 > diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi > index cc3386068c2d..695c4e2807f5 100644 > --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi > @@ -3,7 +3,6 @@ > > /dts-v1/; > #include "dt-bindings/clock/microchip,mpfs-clock.h" > -#include "mpfs-fabric.dtsi" > > / { > #address-cells = <2>; >
On 04/05/2022 00:47, Heiko Stuebner wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Am Sonntag, 1. Mai 2022, 21:25:56 CEST schrieb Conor Dooley: >> From: Conor Dooley <conor.dooley@microchip.com> >> >> Currently mpfs-fabric.dtsi is included by mpfs.dtsi - which is fine >> currently since there is only one board with this SoC upstream. >> >> However if another board was added, it would include the fabric contents >> of the Icicle Kit's reference design. To avoid this, rename >> mpfs-fabric.dtsi to mpfs-icicle-kit-fabric.dtsi & include it in the dts >> rather than mpfs.dtsi. >> >> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> >> --- >> .../microchip/{mpfs-fabric.dtsi => mpfs-icicle-kit-fabric.dtsi} | 2 ++ >> arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts | 1 + >> arch/riscv/boot/dts/microchip/mpfs.dtsi | 1 - >> 3 files changed, 3 insertions(+), 1 deletion(-) >> rename arch/riscv/boot/dts/microchip/{mpfs-fabric.dtsi => mpfs-icicle-kit-fabric.dtsi} (91%) >> >> diff --git a/arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi >> similarity index 91% >> rename from arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi >> rename to arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi >> index ccaac3371cf9..0d28858b83f2 100644 >> --- a/arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi >> +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi >> @@ -2,6 +2,8 @@ >> /* Copyright (c) 2020-2021 Microchip Technology Inc */ >> >> / { >> + compatible = "microchip,mpfs-icicle-reference-rtlv2203", "microchip,mpfs"; >> + > > I don't really understand the meaning of the added compatible yet. I added it for informational purposes more than anything else. The contents of this file match the 22.03 reference design for the icicle kit's FPGA fabric & an older version of the design may not have the i2c or pwm devices. > It will get overridden by the compatible in the dts and also the > fabric dtsi for the polarberry does not contain a similar thing. I did not add one for the polarberry b/c it has (to my knowledge) no versioning scheme nor fabric peripherals in the design given to customers. Thanks, Conor.
Am Mittwoch, 4. Mai 2022, 08:48:24 CEST schrieb Conor.Dooley@microchip.com: > On 04/05/2022 00:47, Heiko Stuebner wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > Am Sonntag, 1. Mai 2022, 21:25:56 CEST schrieb Conor Dooley: > >> From: Conor Dooley <conor.dooley@microchip.com> > >> > >> Currently mpfs-fabric.dtsi is included by mpfs.dtsi - which is fine > >> currently since there is only one board with this SoC upstream. > >> > >> However if another board was added, it would include the fabric contents > >> of the Icicle Kit's reference design. To avoid this, rename > >> mpfs-fabric.dtsi to mpfs-icicle-kit-fabric.dtsi & include it in the dts > >> rather than mpfs.dtsi. > >> > >> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > >> --- > >> .../microchip/{mpfs-fabric.dtsi => mpfs-icicle-kit-fabric.dtsi} | 2 ++ > >> arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts | 1 + > >> arch/riscv/boot/dts/microchip/mpfs.dtsi | 1 - > >> 3 files changed, 3 insertions(+), 1 deletion(-) > >> rename arch/riscv/boot/dts/microchip/{mpfs-fabric.dtsi => mpfs-icicle-kit-fabric.dtsi} (91%) > >> > >> diff --git a/arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi > >> similarity index 91% > >> rename from arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi > >> rename to arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi > >> index ccaac3371cf9..0d28858b83f2 100644 > >> --- a/arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi > >> +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi > >> @@ -2,6 +2,8 @@ > >> /* Copyright (c) 2020-2021 Microchip Technology Inc */ > >> > >> / { > >> + compatible = "microchip,mpfs-icicle-reference-rtlv2203", "microchip,mpfs"; > >> + > > > > I don't really understand the meaning of the added compatible yet. > > > I added it for informational purposes more than anything else. > The contents of this file match the 22.03 reference design for > the icicle kit's FPGA fabric & an older version of the design > may not have the i2c or pwm devices. that makes sense, thanks for the explanation :-) Reviewed-by: Heiko Stuebner <heiko@sntech.de> > > It will get overridden by the compatible in the dts and also the > > fabric dtsi for the polarberry does not contain a similar thing. > > I did not add one for the polarberry b/c it has (to my knowledge) > no versioning scheme nor fabric peripherals in the design given > to customers. > > Thanks, > Conor. >
diff --git a/arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi similarity index 91% rename from arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi rename to arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi index ccaac3371cf9..0d28858b83f2 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi @@ -2,6 +2,8 @@ /* Copyright (c) 2020-2021 Microchip Technology Inc */ / { + compatible = "microchip,mpfs-icicle-reference-rtlv2203", "microchip,mpfs"; + core_pwm0: pwm@41000000 { compatible = "microchip,corepwm-rtl-v4"; reg = <0x0 0x41000000 0x0 0xF0>; diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts index 84b0015dfd47..739dfa52bed1 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts @@ -4,6 +4,7 @@ /dts-v1/; #include "mpfs.dtsi" +#include "mpfs-icicle-kit-fabric.dtsi" /* Clock frequency (in Hz) of the rtcclk */ #define RTCCLK_FREQ 1000000 diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index cc3386068c2d..695c4e2807f5 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -3,7 +3,6 @@ /dts-v1/; #include "dt-bindings/clock/microchip,mpfs-clock.h" -#include "mpfs-fabric.dtsi" / { #address-cells = <2>;