| Message ID | 20220805125618.733628-2-conor.dooley@microchip.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MPFS mailbox fixes | expand |
On 05/08/2022 13:56, Conor Dooley wrote: > The "data" region of the PolarFire SoC's system controller mailbox is > not one continuous register space - the system controller's QSPI sits > between the control and data registers. Split the "data" reg into two > parts: "data" & "control". > > Fixes: 213556235526 ("dt-bindings: soc/microchip: update syscontroller compatibles") I omitted the second fixes tag: Fixes: ed9543d6f2c4 ("dt-bindings: add bindings for polarfire soc mailbox") > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > .../bindings/mailbox/microchip,mpfs-mailbox.yaml | 15 +++++++++++---- > 1 file changed, 11 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml > index 082d397d3e89..935937c67133 100644 > --- a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml > +++ b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml > @@ -14,9 +14,15 @@ properties: > const: microchip,mpfs-mailbox > > reg: > - items: > - - description: mailbox data registers > - - description: mailbox interrupt registers > + oneOf: > + - items: > + - description: mailbox control & data registers > + - description: mailbox interrupt registers > + deprecated: true > + - items: > + - description: mailbox control registers > + - description: mailbox interrupt registers > + - description: mailbox data registers > > interrupts: > maxItems: 1 > @@ -39,7 +45,8 @@ examples: > #size-cells = <2>; > mbox: mailbox@37020000 { > compatible = "microchip,mpfs-mailbox"; > - reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>; > + reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>, > + <0x0 0x37020800 0x0 0x100>; > interrupt-parent = <&L1>; > interrupts = <96>; > #mbox-cells = <1>;
On 05/08/2022 15:01, Conor.Dooley@microchip.com wrote: > On 05/08/2022 13:56, Conor Dooley wrote: >> The "data" region of the PolarFire SoC's system controller mailbox is >> not one continuous register space - the system controller's QSPI sits >> between the control and data registers. Split the "data" reg into two >> parts: "data" & "control". >> >> Fixes: 213556235526 ("dt-bindings: soc/microchip: update syscontroller compatibles") > > I omitted the second fixes tag: > Fixes: ed9543d6f2c4 ("dt-bindings: add bindings for polarfire soc mailbox") > >> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> >> --- >> .../bindings/mailbox/microchip,mpfs-mailbox.yaml | 15 +++++++++++---- >> 1 file changed, 11 insertions(+), 4 deletions(-) >> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml index 082d397d3e89..935937c67133 100644 --- a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml @@ -14,9 +14,15 @@ properties: const: microchip,mpfs-mailbox reg: - items: - - description: mailbox data registers - - description: mailbox interrupt registers + oneOf: + - items: + - description: mailbox control & data registers + - description: mailbox interrupt registers + deprecated: true + - items: + - description: mailbox control registers + - description: mailbox interrupt registers + - description: mailbox data registers interrupts: maxItems: 1 @@ -39,7 +45,8 @@ examples: #size-cells = <2>; mbox: mailbox@37020000 { compatible = "microchip,mpfs-mailbox"; - reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>; + reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>, + <0x0 0x37020800 0x0 0x100>; interrupt-parent = <&L1>; interrupts = <96>; #mbox-cells = <1>;
The "data" region of the PolarFire SoC's system controller mailbox is not one continuous register space - the system controller's QSPI sits between the control and data registers. Split the "data" reg into two parts: "data" & "control". Fixes: 213556235526 ("dt-bindings: soc/microchip: update syscontroller compatibles") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- .../bindings/mailbox/microchip,mpfs-mailbox.yaml | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-)