@@ -10,6 +10,7 @@ config OPENRISC
select ARCH_HAS_DMA_SET_UNCACHED
select ARCH_HAS_DMA_CLEAR_UNCACHED
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
+ select ARCH_USE_QUEUED_SPINLOCKS
select COMMON_CLK
select OF
select OF_EARLY_FLATTREE
@@ -2,6 +2,8 @@
generic-y += extable.h
generic-y += kvm_para.h
generic-y += parport.h
+generic-y += mcs_spinlock.h
+generic-y += qspinlock.h
generic-y += spinlock_types.h
generic-y += spinlock.h
generic-y += qrwlock_types.h
@@ -65,6 +65,27 @@ static inline u32 cmpxchg32(volatile void *ptr, u32 old, u32 new)
})
/* xchg */
+static inline u32 xchg16(volatile void *ptr, u32 val)
+{
+ u32 ret, tmp;
+ u32 shif = ((ulong)ptr & 2) ? 16 : 0;
+ u32 mask = 0xffff << shif;
+ u32 *__ptr = (u32 *)((ulong)ptr & ~2);
+
+ __asm__ __volatile__(
+ "1: l.lwa %0, 0(%2) \n"
+ " l.and %1, %0, %3 \n"
+ " l.or %1, %1, %4 \n"
+ " l.swa 0(%2), %1 \n"
+ " l.bnf 1b \n"
+ " l.nop \n"
+ : "=&r" (ret), "=&r" (tmp)
+ : "r"(__ptr), "r" (~mask), "r" (val << shif)
+ : "cc", "memory");
+
+ return (ret & mask) >> shif;
+}
+
static inline u32 xchg32(volatile void *ptr, u32 val)
{
__asm__ __volatile__(
@@ -85,6 +106,10 @@ static inline u32 xchg32(volatile void *ptr, u32 val)
__typeof__(new) __new = (new); \
__typeof__(*(ptr)) __ret; \
switch (size) { \
+ case 2: \
+ __ret = (__typeof__(*(ptr))) \
+ xchg16(__ptr, (u32)__new); \
+ break; \
case 4: \
__ret = (__typeof__(*(ptr))) \
xchg32(__ptr, (u32)__new); \