| Message ID | 20220901222744.2210215-4-heiko@sntech.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] riscv: cleanup svpbmt cpufeature probing | expand |
Is it a Fixes? On Fri, Sep 2, 2022 at 6:28 AM Heiko Stuebner <heiko@sntech.de> wrote: > > The t-head variant of page-based memory types should also check first > for the enabled kernel config option. > > Signed-off-by: Heiko Stuebner <heiko@sntech.de> > --- > arch/riscv/errata/thead/errata.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c > index a6f4bd8ccf3f..902e12452821 100644 > --- a/arch/riscv/errata/thead/errata.c > +++ b/arch/riscv/errata/thead/errata.c > @@ -17,6 +17,9 @@ > static bool errata_probe_pbmt(unsigned int stage, > unsigned long arch_id, unsigned long impid) > { > + if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PBMT)) > + return false; > + > if (arch_id != 0 || impid != 0) > return false; > > -- > 2.35.1 >
On 02/09/2022 02:06, Guo Ren wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Is it a Fixes? Looks like one to me, seems a fixes tag would be good to have here... Either way: Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > On Fri, Sep 2, 2022 at 6:28 AM Heiko Stuebner <heiko@sntech.de> wrote: >> >> The t-head variant of page-based memory types should also check first >> for the enabled kernel config option. >> >> Signed-off-by: Heiko Stuebner <heiko@sntech.de> >> --- >> arch/riscv/errata/thead/errata.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c >> index a6f4bd8ccf3f..902e12452821 100644 >> --- a/arch/riscv/errata/thead/errata.c >> +++ b/arch/riscv/errata/thead/errata.c >> @@ -17,6 +17,9 @@ >> static bool errata_probe_pbmt(unsigned int stage, >> unsigned long arch_id, unsigned long impid) >> { >> + if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PBMT)) >> + return false; >> + >> if (arch_id != 0 || impid != 0) >> return false; >> >> -- >> 2.35.1 >> > > > -- > Best Regards > Guo Ren
On Fri, Sep 02, 2022 at 12:27:44AM +0200, Heiko Stuebner wrote: > The t-head variant of page-based memory types should also check first > for the enabled kernel config option. > > Signed-off-by: Heiko Stuebner <heiko@sntech.de> > --- > arch/riscv/errata/thead/errata.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c > index a6f4bd8ccf3f..902e12452821 100644 > --- a/arch/riscv/errata/thead/errata.c > +++ b/arch/riscv/errata/thead/errata.c > @@ -17,6 +17,9 @@ > static bool errata_probe_pbmt(unsigned int stage, > unsigned long arch_id, unsigned long impid) > { > + if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PBMT)) > + return false; > + > if (arch_id != 0 || impid != 0) > return false; > > -- > 2.35.1 > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Am Freitag, 2. September 2022, 11:33:27 CEST schrieb Conor.Dooley@microchip.com: > On 02/09/2022 02:06, Guo Ren wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > Is it a Fixes? > > Looks like one to me, seems a fixes tag would be good to > have here... Either way: > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> The alternative itself also is protected by the kconfig-option, so even if probe says "yes", nothing will be patched when CONFIG_ERRATA_THEAD_PBMT is not enabled. So for the memory-types it's more a change to keep it consistent with the other extensions. But I guess we can add the fixes-tag anyway, as it makes sure that doesn't get copy-pasted somewhere else :-) Heiko > > > > On Fri, Sep 2, 2022 at 6:28 AM Heiko Stuebner <heiko@sntech.de> wrote: > >> > >> The t-head variant of page-based memory types should also check first > >> for the enabled kernel config option. > >> > >> Signed-off-by: Heiko Stuebner <heiko@sntech.de> > >> --- > >> arch/riscv/errata/thead/errata.c | 3 +++ > >> 1 file changed, 3 insertions(+) > >> > >> diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c > >> index a6f4bd8ccf3f..902e12452821 100644 > >> --- a/arch/riscv/errata/thead/errata.c > >> +++ b/arch/riscv/errata/thead/errata.c > >> @@ -17,6 +17,9 @@ > >> static bool errata_probe_pbmt(unsigned int stage, > >> unsigned long arch_id, unsigned long impid) > >> { > >> + if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PBMT)) > >> + return false; > >> + > >> if (arch_id != 0 || impid != 0) > >> return false; > >> > >> -- > >> 2.35.1 > >> > > > > > > -- > > Best Regards > > Guo Ren > >
diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c index a6f4bd8ccf3f..902e12452821 100644 --- a/arch/riscv/errata/thead/errata.c +++ b/arch/riscv/errata/thead/errata.c @@ -17,6 +17,9 @@ static bool errata_probe_pbmt(unsigned int stage, unsigned long arch_id, unsigned long impid) { + if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PBMT)) + return false; + if (arch_id != 0 || impid != 0) return false;
The t-head variant of page-based memory types should also check first for the enabled kernel config option. Signed-off-by: Heiko Stuebner <heiko@sntech.de> --- arch/riscv/errata/thead/errata.c | 3 +++ 1 file changed, 3 insertions(+)