diff mbox series

[v2,4/5] riscv: use BIT() marco for cpufeature probing

Message ID 20220905111027.2463297-5-heiko@sntech.de (mailing list archive)
State Accepted
Commit e283187c034cd80c1dd98ad732c73ce930a5efa4
Delegated to: Palmer Dabbelt
Headers show
Series Some style cleanups for recent extension additions | expand

Commit Message

Heiko Stuebner Sept. 5, 2022, 11:10 a.m. UTC
Using the appropriate BIT macro makes the code better readable.

Suggested-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/riscv/kernel/cpufeature.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Conor Dooley Sept. 5, 2022, 11:19 a.m. UTC | #1
On 05/09/2022 12:10, Heiko Stuebner wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Using the appropriate BIT macro makes the code better readable.
> 
> Suggested-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Missing the cover-letter with the changelog?
At least, I didn't get it in my inbox. Either way,

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

> ---
>   arch/riscv/kernel/cpufeature.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 729f7a218093..08f7445985dc 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -289,10 +289,10 @@ static u32 __init_or_module cpufeature_probe(unsigned int stage)
>          u32 cpu_req_feature = 0;
> 
>          if (cpufeature_probe_svpbmt(stage))
> -               cpu_req_feature |= (1U << CPUFEATURE_SVPBMT);
> +               cpu_req_feature |= BIT(CPUFEATURE_SVPBMT);
> 
>          if (cpufeature_probe_zicbom(stage))
> -               cpu_req_feature |= (1U << CPUFEATURE_ZICBOM);
> +               cpu_req_feature |= BIT(CPUFEATURE_ZICBOM);
> 
>          return cpu_req_feature;
>   }
> --
> 2.35.1
>
Heiko Stuebner Sept. 5, 2022, 11:23 a.m. UTC | #2
Am Montag, 5. September 2022, 13:19:41 CEST schrieb Conor.Dooley@microchip.com:
> On 05/09/2022 12:10, Heiko Stuebner wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > 
> > Using the appropriate BIT macro makes the code better readable.
> > 
> > Suggested-by: Conor Dooley <conor.dooley@microchip.com>
> > Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> 
> Missing the cover-letter with the changelog?
> At least, I didn't get it in my inbox.

darn git send-email and its automatic selection ;-)

I.e. I _should_ have added you to the hard recipient list for my series
in the first place, but instead git send-email selected you based on
the Suggested-by ... but it looks like these selectoions don't get
applied to the cover-letter ... sorry about that


Heiko


> Either way,
> 
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> 
> > ---
> >   arch/riscv/kernel/cpufeature.c | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> > index 729f7a218093..08f7445985dc 100644
> > --- a/arch/riscv/kernel/cpufeature.c
> > +++ b/arch/riscv/kernel/cpufeature.c
> > @@ -289,10 +289,10 @@ static u32 __init_or_module cpufeature_probe(unsigned int stage)
> >          u32 cpu_req_feature = 0;
> > 
> >          if (cpufeature_probe_svpbmt(stage))
> > -               cpu_req_feature |= (1U << CPUFEATURE_SVPBMT);
> > +               cpu_req_feature |= BIT(CPUFEATURE_SVPBMT);
> > 
> >          if (cpufeature_probe_zicbom(stage))
> > -               cpu_req_feature |= (1U << CPUFEATURE_ZICBOM);
> > +               cpu_req_feature |= BIT(CPUFEATURE_ZICBOM);
> > 
> >          return cpu_req_feature;
> >   }
> > --
> > 2.35.1
> > 
> 
>
Heiko Stuebner Sept. 5, 2022, 2:12 p.m. UTC | #3
Am Montag, 5. September 2022, 13:23:01 CEST schrieb Heiko Stübner:
> Am Montag, 5. September 2022, 13:19:41 CEST schrieb Conor.Dooley@microchip.com:
> > On 05/09/2022 12:10, Heiko Stuebner wrote:
> > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > > 
> > > Using the appropriate BIT macro makes the code better readable.
> > > 
> > > Suggested-by: Conor Dooley <conor.dooley@microchip.com>
> > > Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> > 
> > Missing the cover-letter with the changelog?
> > At least, I didn't get it in my inbox.
> 
> darn git send-email and its automatic selection ;-)
> 
> I.e. I _should_ have added you to the hard recipient list for my series
> in the first place, but instead git send-email selected you based on
> the Suggested-by ... but it looks like these selectoions don't get
> applied to the cover-letter ... sorry about that

For the record, the series is here:
https://lore.kernel.org/all/20220905111027.2463297-1-heiko@sntech.de/

Though right now, I don't see it in the linux-riscv list-archive or my
own inbox of that list. Maybe infradead has some issue today.



> 
> 
> Heiko
> 
> 
> > Either way,
> > 
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > 
> > > ---
> > >   arch/riscv/kernel/cpufeature.c | 4 ++--
> > >   1 file changed, 2 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> > > index 729f7a218093..08f7445985dc 100644
> > > --- a/arch/riscv/kernel/cpufeature.c
> > > +++ b/arch/riscv/kernel/cpufeature.c
> > > @@ -289,10 +289,10 @@ static u32 __init_or_module cpufeature_probe(unsigned int stage)
> > >          u32 cpu_req_feature = 0;
> > > 
> > >          if (cpufeature_probe_svpbmt(stage))
> > > -               cpu_req_feature |= (1U << CPUFEATURE_SVPBMT);
> > > +               cpu_req_feature |= BIT(CPUFEATURE_SVPBMT);
> > > 
> > >          if (cpufeature_probe_zicbom(stage))
> > > -               cpu_req_feature |= (1U << CPUFEATURE_ZICBOM);
> > > +               cpu_req_feature |= BIT(CPUFEATURE_ZICBOM);
> > > 
> > >          return cpu_req_feature;
> > >   }
> > > --
> > > 2.35.1
> > > 
> > 
> > 
> 
>
Conor Dooley Sept. 5, 2022, 2:16 p.m. UTC | #4
On 05/09/2022 15:12, Heiko Stübner wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Am Montag, 5. September 2022, 13:23:01 CEST schrieb Heiko Stübner:
>> Am Montag, 5. September 2022, 13:19:41 CEST schrieb Conor.Dooley@microchip.com:
>>> On 05/09/2022 12:10, Heiko Stuebner wrote:
>>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>>
>>>> Using the appropriate BIT macro makes the code better readable.
>>>>
>>>> Suggested-by: Conor Dooley <conor.dooley@microchip.com>
>>>> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
>>>
>>> Missing the cover-letter with the changelog?
>>> At least, I didn't get it in my inbox.
>>
>> darn git send-email and its automatic selection ;-)
>>
>> I.e. I _should_ have added you to the hard recipient list for my series
>> in the first place, but instead git send-email selected you based on
>> the Suggested-by ... but it looks like these selectoions don't get
>> applied to the cover-letter ... sorry about that
> 
> For the record, the series is here:
> https://lore.kernel.org/all/20220905111027.2463297-1-heiko@sntech.de/
> 
> Though right now, I don't see it in the linux-riscv list-archive or my
> own inbox of that list. Maybe infradead has some issue today.

I ended up seeing it in one of my random folders but not my linux-riscv
which is where I checked after it didnt come directly.

>>> Either way,
>>>
>>> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

btw, just noticed - s/marco/macro in the subject...

Conor.
Guo Ren Sept. 7, 2022, 11:12 p.m. UTC | #5
Reviewed-by: Guo Ren <guoren@kernel.org>

On Thu, Sep 8, 2022 at 6:50 AM Atish Patra <atishp@atishpatra.org> wrote:
>
>
>
> On Mon, Sep 5, 2022 at 7:15 AM Heiko Stuebner <heiko@sntech.de> wrote:
>>
>> Using the appropriate BIT macro makes the code better readable.
>>
>> Suggested-by: Conor Dooley <conor.dooley@microchip.com>
>> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>>  arch/riscv/kernel/cpufeature.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
>> index 729f7a218093..08f7445985dc 100644
>> --- a/arch/riscv/kernel/cpufeature.c
>> +++ b/arch/riscv/kernel/cpufeature.c
>> @@ -289,10 +289,10 @@ static u32 __init_or_module cpufeature_probe(unsigned int stage)
>>         u32 cpu_req_feature = 0;
>>
>>         if (cpufeature_probe_svpbmt(stage))
>> -               cpu_req_feature |= (1U << CPUFEATURE_SVPBMT);
>> +               cpu_req_feature |= BIT(CPUFEATURE_SVPBMT);
>>
>>         if (cpufeature_probe_zicbom(stage))
>> -               cpu_req_feature |= (1U << CPUFEATURE_ZICBOM);
>> +               cpu_req_feature |= BIT(CPUFEATURE_ZICBOM);
>>
>>         return cpu_req_feature;
>>  }
>> --
>> 2.35.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
>
>
>
> Reviewed-by: Atish Patra <atishp@rivosinc.com>
>
> --
> Regards,
> Atish
diff mbox series

Patch

diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index 729f7a218093..08f7445985dc 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -289,10 +289,10 @@  static u32 __init_or_module cpufeature_probe(unsigned int stage)
 	u32 cpu_req_feature = 0;
 
 	if (cpufeature_probe_svpbmt(stage))
-		cpu_req_feature |= (1U << CPUFEATURE_SVPBMT);
+		cpu_req_feature |= BIT(CPUFEATURE_SVPBMT);
 
 	if (cpufeature_probe_zicbom(stage))
-		cpu_req_feature |= (1U << CPUFEATURE_ZICBOM);
+		cpu_req_feature |= BIT(CPUFEATURE_ZICBOM);
 
 	return cpu_req_feature;
 }