| Message ID | 20220909123123.2699583-8-conor.dooley@microchip.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | PolarFire SoC reset controller & clock cleanups | expand |
On Fri, Sep 09, 2022 at 01:31:16PM +0100, Conor Dooley wrote: > The macb on PolarFire SoC has reset support which the generic compatible > does not use. Add the newly introduced MPFS specific compatible as the > primary compatible to avail of this support & wire up the reset to the > clock controllers devicetree entry. > > Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Somehow I lost my own patch between the cracks.. I've gone and applied it now as v6.4 content: https://git.kernel.org/conor/c/0e9b70c1e3623fa110fb6be553e644524228ef60 Cheers, Conor. > --- > arch/riscv/boot/dts/microchip/mpfs.dtsi | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi > index 499c2e63ad35..ae5839534d9c 100644 > --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi > @@ -234,6 +234,7 @@ clkcfg: clkcfg@20002000 { > reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>; > clocks = <&refclk>; > #clock-cells = <1>; > + #reset-cells = <1>; > }; > > mmuart0: serial@20000000 { > @@ -383,7 +384,7 @@ can1: can@2010d000 { > }; > > mac0: ethernet@20110000 { > - compatible = "cdns,macb"; > + compatible = "microchip,mpfs-macb", "cdns,macb"; > reg = <0x0 0x20110000 0x0 0x2000>; > #address-cells = <1>; > #size-cells = <0>; > @@ -392,11 +393,12 @@ mac0: ethernet@20110000 { > local-mac-address = [00 00 00 00 00 00]; > clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>; > clock-names = "pclk", "hclk"; > + resets = <&clkcfg CLK_MAC0>; > status = "disabled"; > }; > > mac1: ethernet@20112000 { > - compatible = "cdns,macb"; > + compatible = "microchip,mpfs-macb", "cdns,macb"; > reg = <0x0 0x20112000 0x0 0x2000>; > #address-cells = <1>; > #size-cells = <0>; > @@ -405,6 +407,7 @@ mac1: ethernet@20112000 { > local-mac-address = [00 00 00 00 00 00]; > clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>; > clock-names = "pclk", "hclk"; > + resets = <&clkcfg CLK_MAC1>; > status = "disabled"; > }; > > -- > 2.36.1 > >
diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index 499c2e63ad35..ae5839534d9c 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -234,6 +234,7 @@ clkcfg: clkcfg@20002000 { reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>; clocks = <&refclk>; #clock-cells = <1>; + #reset-cells = <1>; }; mmuart0: serial@20000000 { @@ -383,7 +384,7 @@ can1: can@2010d000 { }; mac0: ethernet@20110000 { - compatible = "cdns,macb"; + compatible = "microchip,mpfs-macb", "cdns,macb"; reg = <0x0 0x20110000 0x0 0x2000>; #address-cells = <1>; #size-cells = <0>; @@ -392,11 +393,12 @@ mac0: ethernet@20110000 { local-mac-address = [00 00 00 00 00 00]; clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>; clock-names = "pclk", "hclk"; + resets = <&clkcfg CLK_MAC0>; status = "disabled"; }; mac1: ethernet@20112000 { - compatible = "cdns,macb"; + compatible = "microchip,mpfs-macb", "cdns,macb"; reg = <0x0 0x20112000 0x0 0x2000>; #address-cells = <1>; #size-cells = <0>; @@ -405,6 +407,7 @@ mac1: ethernet@20112000 { local-mac-address = [00 00 00 00 00 00]; clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>; clock-names = "pclk", "hclk"; + resets = <&clkcfg CLK_MAC1>; status = "disabled"; };