| Message ID | 20220915135148.2968422-1-conor.dooley@microchip.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MAINTAINERS: update polarfire soc clock binding | expand |
diff --git a/MAINTAINERS b/MAINTAINERS index c26a5c573a5d..170acda52f03 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17618,7 +17618,7 @@ M: Conor Dooley <conor.dooley@microchip.com> M: Daire McNamara <daire.mcnamara@microchip.com> L: linux-riscv@lists.infradead.org S: Supported -F: Documentation/devicetree/bindings/clock/microchip,mpfs.yaml +F: Documentation/devicetree/bindings/clock/microchip,mpfs*.yaml F: Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml F: Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml F: Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
The clock binding has been renamed and a new binding added for the clock controllers in the FPGA fabric. Generalise the pattern to cover both. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- The maintainers addition of binding coverage landed as a 6.0 fix via soc while the binding was renamed in patches pending for 6.1. I'll send this via soc for 6.1 --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)