| Message ID | 20220918055940.24726-1-tjytimi@163.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] riscv: support update_mmu_tlb() for riscv | expand |
Hey Jinyu, Firstly, the "for riscv" in the title is redundant and can be dropped. On Sun, Sep 18, 2022 at 01:59:40PM +0800, Jinyu Tang wrote: > Add macro definition to support updata_mmu_tlb() for riscv, ^ s/updata/update/ > this function is from commit:7df676974359 ("mm/memory.c:Update > local TLB if PTE entry exists"). So, and this just may be may lack of knowledge showing, but I don't really understand _why_ we need this change. Your commit message should explain why you are making the change rather than just repeating what you are doing since that is obvious from the diff. Only MIPS seems to have this define, so your commit message needs to explain what it is about RISC-V that means we need it when all bar one arch does not. Thanks, Conor. > > Signed-off-by: Jinyu Tang <tjytimi@163.com> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > --- > v1 -> v2: > > Change the format with the help from Andrew Jones and Conor Dooley. > > arch/riscv/include/asm/pgtable.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h > index 7ec936910a96..c61ae83aadee 100644 > --- a/arch/riscv/include/asm/pgtable.h > +++ b/arch/riscv/include/asm/pgtable.h > @@ -418,6 +418,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, > local_flush_tlb_page(address); > } > > +#define __HAVE_ARCH_UPDATE_MMU_TLB > +#define update_mmu_tlb update_mmu_cache > + > static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, > unsigned long address, pmd_t *pmdp) > { > -- > 2.30.2 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 7ec936910a96..c61ae83aadee 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -418,6 +418,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, local_flush_tlb_page(address); } +#define __HAVE_ARCH_UPDATE_MMU_TLB +#define update_mmu_tlb update_mmu_cache + static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long address, pmd_t *pmdp) {
Add macro definition to support updata_mmu_tlb() for riscv, this function is from commit:7df676974359 ("mm/memory.c:Update local TLB if PTE entry exists"). Signed-off-by: Jinyu Tang <tjytimi@163.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> --- v1 -> v2: Change the format with the help from Andrew Jones and Conor Dooley. arch/riscv/include/asm/pgtable.h | 3 +++ 1 file changed, 3 insertions(+)