[v1,03/30] dt-bindings: interrupt-controller: Add StarFive JH7110 plic

From: Emil Renner Berthing <kernel@esmil.dk>

From: Hal Feng <hal.feng@linux.starfivetech.com>
To: linux-riscv@lists.infradead.org,
	devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org,
	linux-gpio@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Hal Feng <hal.feng@linux.starfivetech.com>,
	linux-kernel@vger.kernel.org
Subject: [PATCH v1 03/30] dt-bindings: interrupt-controller: Add StarFive
 JH7110 plic
Date: Thu, 29 Sep 2022 22:31:58 +0800
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Message ID	20220929143225.17907-4-hal.feng@linux.starfivetech.com (mailing list archive)
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Headers	show Return-Path: <linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org> From: Hal Feng <hal.feng@linux.starfivetech.com> To: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Linus Walleij <linus.walleij@linaro.org>, Emil Renner Berthing <kernel@esmil.dk>, Hal Feng <hal.feng@linux.starfivetech.com>, linux-kernel@vger.kernel.org Subject: [PATCH v1 03/30] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Date: Thu, 29 Sep 2022 22:31:58 +0800 Message-Id: <20220929143225.17907-4-hal.feng@linux.starfivetech.com> In-Reply-To: <20220929143225.17907-1-hal.feng@linux.starfivetech.com> References: <20220929143225.17907-1-hal.feng@linux.starfivetech.com> Feedback-ID: bizesmtp:linux.starfivetech.com:qybglogicsvr:qybglogicsvr2 Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org
Series	Basic StarFive JH7110 RISC-V SoC support \| expand [v1,00/30] Basic StarFive JH7110 RISC-V SoC support [v1,01/30] dt-bindings: riscv: Add StarFive JH7110 bindings [v1,02/30] dt-bindings: timer: Add StarFive JH7110 clint [v1,03/30] dt-bindings: interrupt-controller: Add StarFive JH7110 plic [v1,04/30] dt-bindings: sifive-l2-cache: Support StarFive JH71x0 SoCs [v1,05/30] soc: sifive: l2 cache: Convert to platform driver [v1,06/30] soc: sifive: l2 cache: Add StarFive JH71x0 support [v1,07/30] reset: starfive: jh7100: Use 32bit I/O on 32bit registers [v1,08/30] reset: starfive: jh7100: Use regmap APIs to operate registers [v1,09/30] reset: starfive: jh7100: Move necessary properties to device tree [v1,10/30] reset: starfive: Rename 'reset-starfive-jh7100.c' to 'reset-starfive.c' [v1,11/30] dt-bindings: reset: Add StarFive JH7110 reset definitions [v1,12/30] dt-bindings: reset: Add starfive,jh7110-reset bindings [v1,13/30] reset: starfive: Add StarFive JH7110 SoC support [v1,14/30] clk: starfive: Factor out common clock driver code [v1,15/30] clk: starfive: Use regmap APIs to operate registers [v1,16/30] dt-bindings: clock: Add StarFive JH7110 system clock definitions [v1,17/30] dt-bindings: clock: Add starfive,jh7110-clkgen-sys bindings [v1,18/30] clk: starfive: Add StarFive JH7110 system clock driver [v1,19/30] dt-bindings: clock: Add StarFive JH7110 always-on definitions [v1,20/30] dt-bindings: clock: Add starfive,jh7110-clkgen-aon bindings [v1,21/30] clk: starfive: Add StarFive JH7110 always-on clock driver [v1,22/30] pinctrl: Create subdirectory for StarFive drivers [v1,23/30] pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100" [v1,24/30] dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions [v1,25/30] dt-bindings: pinctrl: Add StarFive JH7110 pinctrl bindings [v1,26/30] pinctrl: starfive: Add StarFive JH7110 driver [v1,27/30] RISC-V: Add initial StarFive JH7110 device tree [v1,28/30] RISC-V: Add StarFive JH7110 VisionFive2 board device tree [v1,29/30] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW [v1,30/30] RISC-V: Add StarFive JH7100 and JH7110 SoC Kconfig options

[v1,03/30] dt-bindings: interrupt-controller: Add StarFive JH7110 plic

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