| Message ID | 20221108110424.166896-3-pierre.gondois@arm.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Palmer Dabbelt |
| Headers | show |
| Series | arch_topology: Build cacheinfo from primary CPU | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/patch_count | success | Link |
| conchuod/cover_letter | success | Series has a cover letter |
| conchuod/tree_selection | success | Guessed tree name to be for-next |
| conchuod/fixes_present | success | Fixes tag not required for -next series |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/build_warn_rv64 | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 24 lines checked |
| conchuod/source_inline | success | Was 0 now: 0 |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | No Fixes tag |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Tue, Nov 08, 2022 at 12:04:18PM +0100, Pierre Gondois wrote: > Make init_of_cache_level() return an error code when the cache > information parsing fails to help detecting missing information. > > init_of_cache_level() is only called for riscv. Returning an error > code instead of 0 will prevent detect_cache_attributes() to allocate > memory if an incomplete DT is parsed. > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index a4308b48dd3e..6f6cd120c4f1 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -246,11 +246,11 @@ int init_of_cache_level(unsigned int cpu) of_node_put(prev); prev = np; if (!of_device_is_compatible(np, "cache")) - break; + goto err_out; if (of_property_read_u32(np, "cache-level", &level)) - break; + goto err_out; if (level <= levels) - break; + goto err_out; if (of_property_read_bool(np, "cache-size")) ++leaves; if (of_property_read_bool(np, "i-cache-size")) @@ -265,6 +265,10 @@ int init_of_cache_level(unsigned int cpu) this_cpu_ci->num_leaves = leaves; return 0; + +err_out: + of_node_put(np); + return -EINVAL; } #else
Make init_of_cache_level() return an error code when the cache information parsing fails to help detecting missing information. init_of_cache_level() is only called for riscv. Returning an error code instead of 0 will prevent detect_cache_attributes() to allocate memory if an incomplete DT is parsed. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> --- drivers/base/cacheinfo.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)