| Message ID | 20221207135352.592556-2-bmeng@tinylab.org (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Palmer Dabbelt |
| Headers | show |
| Series | [v2,1/3] serial: earlycon-arm-semihost: Move smh_putc() variants in respective arch's semihost.h | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/patch_count | success | Link |
| conchuod/cover_letter | warning | Series does not have a cover letter |
| conchuod/tree_selection | success | Guessed tree name to be for-next |
| conchuod/fixes_present | success | Fixes tag not required for -next series |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/alphanumeric_selects | success | Out of order selects before the patch: 57 and now 57 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/build_warn_rv64 | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | warning | WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? |
| conchuod/source_inline | success | Was 0 now: 0 |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | No Fixes tag |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
Hello, Two tiny nits for whenever other comments require a v3. On Wed, Dec 07, 2022 at 09:53:51PM +0800, Bin Meng wrote: > Per RISC-V semihosting spec [1], implement semihost.h for the existing > Arm semihosting earlycon driver to work on RISC-V. > > [1] https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc Could you please use regular Link: tags? Also, for a multi-patch series please send a cover letter :) Thanks, Conor.
diff --git a/arch/riscv/include/asm/semihost.h b/arch/riscv/include/asm/semihost.h new file mode 100644 index 000000000000..886f21d7a476 --- /dev/null +++ b/arch/riscv/include/asm/semihost.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2022 tinylab.org + * Author: Bin Meng <bmeng@tinylab.org> + */ + +static inline void smh_putc(struct uart_port *port, unsigned char c) +{ + asm volatile("addi a1, %0, 0\n" + "addi a0, zero, 3\n" + ".balign 16\n" + ".option push\n" + ".option norvc\n" + "slli zero, zero, 0x1f\n" + "ebreak\n" + "srai zero, zero, 0x7\n" + ".option pop\n" + : : "r" (&c) : "a0", "a1", "memory"); +} diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 434f83168546..e94d1265151c 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -75,7 +75,7 @@ config SERIAL_AMBA_PL011_CONSOLE config SERIAL_EARLYCON_ARM_SEMIHOST bool "Early console using ARM semihosting" - depends on ARM64 || ARM + depends on ARM64 || ARM || RISCV select SERIAL_CORE select SERIAL_CORE_CONSOLE select SERIAL_EARLYCON
Per RISC-V semihosting spec [1], implement semihost.h for the existing Arm semihosting earlycon driver to work on RISC-V. [1] https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc Signed-off-by: Bin Meng <bmeng@tinylab.org> --- Changes in v2: - Move the RISC-V implementation to semihost.h arch/riscv/include/asm/semihost.h | 19 +++++++++++++++++++ drivers/tty/serial/Kconfig | 2 +- 2 files changed, 20 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/include/asm/semihost.h