Message ID | 20221208090237.20572-13-samuel@sholland.org (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | riscv: Allwinner D1/D1s platform support | expand |
Context | Check | Description |
---|---|---|
conchuod/tree_selection | fail | Guessing tree name failed |
On 8 December 2022 10:02:37 GMT+01:00, Samuel Holland <samuel@sholland.org> wrote: >Now that several D1-based boards are supported, enable the platform in >our defconfig. Build in the drivers which are necessary to boot, such as >the pinctrl, MMC, RTC (which provides critical clocks), SPI (for flash), >and watchdog (which may be left enabled by the bootloader). Other common >onboard peripherals are enabled as modules. > >Acked-by: Palmer Dabbelt <palmer@rivosinc.com> I'm more than happy if he's happy ;) Acked-by: Conor Dooley <conor.dooley@microchip.com> >Reviewed-by: Guo Ren <guoren@kernel.org> >Signed-off-by: Samuel Holland <samuel@sholland.org> >--- > >(no changes since v1) > > arch/riscv/configs/defconfig | 22 +++++++++++++++++++++- > 1 file changed, 21 insertions(+), 1 deletion(-) > >diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig >index 74ed7037314f..368175560da9 100644 >--- a/arch/riscv/configs/defconfig >+++ b/arch/riscv/configs/defconfig >@@ -25,6 +25,7 @@ CONFIG_BLK_DEV_INITRD=y > CONFIG_EXPERT=y > # CONFIG_SYSFS_SYSCALL is not set > CONFIG_PROFILING=y >+CONFIG_ARCH_SUNXI=y > CONFIG_SOC_MICROCHIP_POLARFIRE=y > CONFIG_SOC_SIFIVE=y > CONFIG_SOC_STARFIVE=y >@@ -119,8 +120,10 @@ CONFIG_VIRTIO_NET=y > CONFIG_MACB=y > CONFIG_E1000E=y > CONFIG_R8169=y >+CONFIG_STMMAC_ETH=m > CONFIG_MICROSEMI_PHY=y > CONFIG_INPUT_MOUSEDEV=y >+CONFIG_KEYBOARD_SUN4I_LRADC=m > CONFIG_SERIAL_8250=y > CONFIG_SERIAL_8250_CONSOLE=y > CONFIG_SERIAL_8250_DW=y >@@ -128,14 +131,20 @@ CONFIG_SERIAL_OF_PLATFORM=y > CONFIG_VIRTIO_CONSOLE=y > CONFIG_HW_RANDOM=y > CONFIG_HW_RANDOM_VIRTIO=y >+CONFIG_I2C_MV64XXX=m > CONFIG_SPI=y > CONFIG_SPI_SIFIVE=y >+CONFIG_SPI_SUN6I=y > # CONFIG_PTP_1588_CLOCK is not set >-CONFIG_GPIOLIB=y > CONFIG_GPIO_SIFIVE=y >+CONFIG_WATCHDOG=y >+CONFIG_SUNXI_WATCHDOG=y >+CONFIG_REGULATOR=y >+CONFIG_REGULATOR_FIXED_VOLTAGE=y > CONFIG_DRM=m > CONFIG_DRM_RADEON=m > CONFIG_DRM_NOUVEAU=m >+CONFIG_DRM_SUN4I=m > CONFIG_DRM_VIRTIO_GPU=m > CONFIG_FB=y > CONFIG_FRAMEBUFFER_CONSOLE=y >@@ -148,19 +157,30 @@ CONFIG_USB_OHCI_HCD=y > CONFIG_USB_OHCI_HCD_PLATFORM=y > CONFIG_USB_STORAGE=y > CONFIG_USB_UAS=y >+CONFIG_USB_MUSB_HDRC=m >+CONFIG_USB_MUSB_SUNXI=m >+CONFIG_NOP_USB_XCEIV=m > CONFIG_MMC=y > CONFIG_MMC_SDHCI=y > CONFIG_MMC_SDHCI_PLTFM=y > CONFIG_MMC_SDHCI_CADENCE=y > CONFIG_MMC_SPI=y >+CONFIG_MMC_SUNXI=y > CONFIG_RTC_CLASS=y >+CONFIG_RTC_DRV_SUN6I=y >+CONFIG_DMADEVICES=y >+CONFIG_DMA_SUN6I=m > CONFIG_VIRTIO_PCI=y > CONFIG_VIRTIO_BALLOON=y > CONFIG_VIRTIO_INPUT=y > CONFIG_VIRTIO_MMIO=y >+CONFIG_SUN8I_DE2_CCU=m >+CONFIG_SUN50I_IOMMU=y > CONFIG_RPMSG_CHAR=y > CONFIG_RPMSG_CTRL=y > CONFIG_RPMSG_VIRTIO=y >+CONFIG_PHY_SUN4I_USB=m >+CONFIG_NVMEM_SUNXI_SID=y > CONFIG_EXT4_FS=y > CONFIG_EXT4_FS_POSIX_ACL=y > CONFIG_EXT4_FS_SECURITY=y
Am Donnerstag, 8. Dezember 2022, 10:02:37 CET schrieb Samuel Holland: > Now that several D1-based boards are supported, enable the platform in > our defconfig. Build in the drivers which are necessary to boot, such as > the pinctrl, MMC, RTC (which provides critical clocks), SPI (for flash), > and watchdog (which may be left enabled by the bootloader). Other common > onboard peripherals are enabled as modules. > > Acked-by: Palmer Dabbelt <palmer@rivosinc.com> > Reviewed-by: Guo Ren <guoren@kernel.org> > Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 74ed7037314f..368175560da9 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -25,6 +25,7 @@ CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y # CONFIG_SYSFS_SYSCALL is not set CONFIG_PROFILING=y +CONFIG_ARCH_SUNXI=y CONFIG_SOC_MICROCHIP_POLARFIRE=y CONFIG_SOC_SIFIVE=y CONFIG_SOC_STARFIVE=y @@ -119,8 +120,10 @@ CONFIG_VIRTIO_NET=y CONFIG_MACB=y CONFIG_E1000E=y CONFIG_R8169=y +CONFIG_STMMAC_ETH=m CONFIG_MICROSEMI_PHY=y CONFIG_INPUT_MOUSEDEV=y +CONFIG_KEYBOARD_SUN4I_LRADC=m CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DW=y @@ -128,14 +131,20 @@ CONFIG_SERIAL_OF_PLATFORM=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y +CONFIG_I2C_MV64XXX=m CONFIG_SPI=y CONFIG_SPI_SIFIVE=y +CONFIG_SPI_SUN6I=y # CONFIG_PTP_1588_CLOCK is not set -CONFIG_GPIOLIB=y CONFIG_GPIO_SIFIVE=y +CONFIG_WATCHDOG=y +CONFIG_SUNXI_WATCHDOG=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_DRM=m CONFIG_DRM_RADEON=m CONFIG_DRM_NOUVEAU=m +CONFIG_DRM_SUN4I=m CONFIG_DRM_VIRTIO_GPU=m CONFIG_FB=y CONFIG_FRAMEBUFFER_CONSOLE=y @@ -148,19 +157,30 @@ CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_STORAGE=y CONFIG_USB_UAS=y +CONFIG_USB_MUSB_HDRC=m +CONFIG_USB_MUSB_SUNXI=m +CONFIG_NOP_USB_XCEIV=m CONFIG_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_CADENCE=y CONFIG_MMC_SPI=y +CONFIG_MMC_SUNXI=y CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_SUN6I=y +CONFIG_DMADEVICES=y +CONFIG_DMA_SUN6I=m CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_BALLOON=y CONFIG_VIRTIO_INPUT=y CONFIG_VIRTIO_MMIO=y +CONFIG_SUN8I_DE2_CCU=m +CONFIG_SUN50I_IOMMU=y CONFIG_RPMSG_CHAR=y CONFIG_RPMSG_CTRL=y CONFIG_RPMSG_VIRTIO=y +CONFIG_PHY_SUN4I_USB=m +CONFIG_NVMEM_SUNXI_SID=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y