| Message ID | 20230104180513.1379453-2-conor@kernel.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 7d2078310cbf0fa7fb4323d595fe093c418dcd37 |
| Delegated to: | Palmer Dabbelt |
| Headers | show |
| Series | dt-bindings: Add a cpu-capacity property for RISC-V | expand |
> > From: Conor Dooley <conor.dooley@microchip.com> > > RISC-V uses the same generic topology code as arm64 & while there > currently exists no binding for cpu-capacity on RISC-V, the code paths can be > hit if the property is present. > > Move the documentation of cpu-capacity to a shared location, ahead of > defining a binding for capacity-dmips-mhz on RISC-V. Update some > references to this document in the process. > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Hi Conor I plan to move cpu-capacity.txt binding to generic directory as well after [1]. Thanks for your patch series helping this. [1] https://patchwork.kernel.org/project/linux-riscv/patch/20230103035316.3841303-1-leyfoon.tan@starfivetech.com/ Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> Regards Ley Foon
On Wed, 04 Jan 2023 18:05:13 +0000, Conor Dooley wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > RISC-V uses the same generic topology code as arm64 & while there > currently exists no binding for cpu-capacity on RISC-V, the code paths > can be hit if the property is present. > > Move the documentation of cpu-capacity to a shared location, ahead of > defining a binding for capacity-dmips-mhz on RISC-V. Update some > references to this document in the process. > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > I wasn't sure what to do with reference [1], but since the property will > be the same on RISC-V, I left it as is. > --- > Documentation/devicetree/bindings/arm/cpus.yaml | 2 +- > .../devicetree/bindings/{arm => cpu}/cpu-capacity.txt | 4 ++-- > Documentation/scheduler/sched-capacity.rst | 2 +- > Documentation/translations/zh_CN/scheduler/sched-capacity.rst | 2 +- > 4 files changed, 5 insertions(+), 5 deletions(-) > rename Documentation/devicetree/bindings/{arm => cpu}/cpu-capacity.txt (98%) > Acked-by: Rob Herring <robh@kernel.org>
在 1/5/23 02:05, Conor Dooley 写道: > From: Conor Dooley <conor.dooley@microchip.com> > > RISC-V uses the same generic topology code as arm64 & while there > currently exists no binding for cpu-capacity on RISC-V, the code paths > can be hit if the property is present. > > Move the documentation of cpu-capacity to a shared location, ahead of > defining a binding for capacity-dmips-mhz on RISC-V. Update some > references to this document in the process. > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Yanteng Si <siyanteng@loongson.cn> > --- > I wasn't sure what to do with reference [1], but since the property will > be the same on RISC-V, I left it as is. > --- > Documentation/devicetree/bindings/arm/cpus.yaml | 2 +- > .../devicetree/bindings/{arm => cpu}/cpu-capacity.txt | 4 ++-- > Documentation/scheduler/sched-capacity.rst | 2 +- > Documentation/translations/zh_CN/scheduler/sched-capacity.rst | 2 +- > 4 files changed, 5 insertions(+), 5 deletions(-) > rename Documentation/devicetree/bindings/{arm => cpu}/cpu-capacity.txt (98%) > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > index 01b5a9c689a2..a7586295a6f5 100644 > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > @@ -257,7 +257,7 @@ properties: > > capacity-dmips-mhz: > description: > - u32 value representing CPU capacity (see ./cpu-capacity.txt) in > + u32 value representing CPU capacity (see ../cpu/cpu-capacity.txt) in > DMIPS/MHz, relative to highest capacity-dmips-mhz > in the system. > > diff --git a/Documentation/devicetree/bindings/arm/cpu-capacity.txt b/Documentation/devicetree/bindings/cpu/cpu-capacity.txt > similarity index 98% > rename from Documentation/devicetree/bindings/arm/cpu-capacity.txt > rename to Documentation/devicetree/bindings/cpu/cpu-capacity.txt > index cc5e190390b7..f28e1adad428 100644 > --- a/Documentation/devicetree/bindings/arm/cpu-capacity.txt > +++ b/Documentation/devicetree/bindings/cpu/cpu-capacity.txt > @@ -1,12 +1,12 @@ > ========================================== > -ARM CPUs capacity bindings > +CPU capacity bindings > ========================================== > > ========================================== > 1 - Introduction > ========================================== > > -ARM systems may be configured to have cpus with different power/performance > +Some systems may be configured to have cpus with different power/performance > characteristics within the same chip. In this case, additional information has > to be made available to the kernel for it to be aware of such differences and > take decisions accordingly. > diff --git a/Documentation/scheduler/sched-capacity.rst b/Documentation/scheduler/sched-capacity.rst > index 805f85f330b5..8e2b8538bc2b 100644 > --- a/Documentation/scheduler/sched-capacity.rst > +++ b/Documentation/scheduler/sched-capacity.rst > @@ -260,7 +260,7 @@ for that purpose. > > The arm and arm64 architectures directly map this to the arch_topology driver > CPU scaling data, which is derived from the capacity-dmips-mhz CPU binding; see > -Documentation/devicetree/bindings/arm/cpu-capacity.txt. > +Documentation/devicetree/bindings/cpu/cpu-capacity.txt. > > 3.2 Frequency invariance > ------------------------ > diff --git a/Documentation/translations/zh_CN/scheduler/sched-capacity.rst b/Documentation/translations/zh_CN/scheduler/sched-capacity.rst > index 3a52053c29dc..e07ffdd391d3 100644 > --- a/Documentation/translations/zh_CN/scheduler/sched-capacity.rst > +++ b/Documentation/translations/zh_CN/scheduler/sched-capacity.rst > @@ -233,7 +233,7 @@ CFS调度类基于实体负载跟踪机制（Per-Entity Load Tracking, PELT） > > arm和arm64架构直接把这个信息映射到arch_topology驱动的CPU scaling数据中（译注：参考 > arch_topology.h的percpu变量cpu_scale），它是从capacity-dmips-mhz CPU binding中衍生计算 > -出来的。参见Documentation/devicetree/bindings/arm/cpu-capacity.txt。 > +出来的。参见Documentation/devicetree/bindings/cpu/cpu-capacity.txt。 > > 3.2 频率不变性 > --------------
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 01b5a9c689a2..a7586295a6f5 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -257,7 +257,7 @@ properties: capacity-dmips-mhz: description: - u32 value representing CPU capacity (see ./cpu-capacity.txt) in + u32 value representing CPU capacity (see ../cpu/cpu-capacity.txt) in DMIPS/MHz, relative to highest capacity-dmips-mhz in the system. diff --git a/Documentation/devicetree/bindings/arm/cpu-capacity.txt b/Documentation/devicetree/bindings/cpu/cpu-capacity.txt similarity index 98% rename from Documentation/devicetree/bindings/arm/cpu-capacity.txt rename to Documentation/devicetree/bindings/cpu/cpu-capacity.txt index cc5e190390b7..f28e1adad428 100644 --- a/Documentation/devicetree/bindings/arm/cpu-capacity.txt +++ b/Documentation/devicetree/bindings/cpu/cpu-capacity.txt @@ -1,12 +1,12 @@ ========================================== -ARM CPUs capacity bindings +CPU capacity bindings ========================================== ========================================== 1 - Introduction ========================================== -ARM systems may be configured to have cpus with different power/performance +Some systems may be configured to have cpus with different power/performance characteristics within the same chip. In this case, additional information has to be made available to the kernel for it to be aware of such differences and take decisions accordingly. diff --git a/Documentation/scheduler/sched-capacity.rst b/Documentation/scheduler/sched-capacity.rst index 805f85f330b5..8e2b8538bc2b 100644 --- a/Documentation/scheduler/sched-capacity.rst +++ b/Documentation/scheduler/sched-capacity.rst @@ -260,7 +260,7 @@ for that purpose. The arm and arm64 architectures directly map this to the arch_topology driver CPU scaling data, which is derived from the capacity-dmips-mhz CPU binding; see -Documentation/devicetree/bindings/arm/cpu-capacity.txt. +Documentation/devicetree/bindings/cpu/cpu-capacity.txt. 3.2 Frequency invariance ------------------------ diff --git a/Documentation/translations/zh_CN/scheduler/sched-capacity.rst b/Documentation/translations/zh_CN/scheduler/sched-capacity.rst index 3a52053c29dc..e07ffdd391d3 100644 --- a/Documentation/translations/zh_CN/scheduler/sched-capacity.rst +++ b/Documentation/translations/zh_CN/scheduler/sched-capacity.rst @@ -233,7 +233,7 @@ CFS调度类基于实体负载跟踪机制（Per-Entity Load Tracking, PELT） arm和arm64架构直接把这个信息映射到arch_topology驱动的CPU scaling数据中（译注：参考 arch_topology.h的percpu变量cpu_scale），它是从capacity-dmips-mhz CPU binding中衍生计算 -出来的。参见Documentation/devicetree/bindings/arm/cpu-capacity.txt。 +出来的。参见Documentation/devicetree/bindings/cpu/cpu-capacity.txt。 3.2 频率不变性 --------------