diff mbox series

[15/24] clocksource/timer-riscv: Refactor riscv_timer_init_dt()

Message ID 20230130182225.2471414-16-sunilvl@ventanamicro.com (mailing list archive)
State Superseded
Delegated to: Palmer Dabbelt
Headers show
Series Add basic ACPI support for RISC-V | expand

Checks

Context Check Description
conchuod/tree_selection fail Failed to apply to next/pending-fixes or riscv/for-next

Commit Message

Sunil V L Jan. 30, 2023, 6:22 p.m. UTC 
Refactor the timer init function such that few things can be shared by
both DT and ACPI based platforms.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
 drivers/clocksource/timer-riscv.c | 79 +++++++++++++++----------------
 1 file changed, 37 insertions(+), 42 deletions(-)

Comments

Conor Dooley Feb. 9, 2023, 8:54 p.m. UTC | #1 
Hey Sunil,

On Mon, Jan 30, 2023 at 11:52:16PM +0530, Sunil V L wrote:
> Refactor the timer init function such that few things can be shared by
> both DT and ACPI based platforms.
> 
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>

What did Anup do here? He's not author or co-author, so the SoB chain
looks incorrect.

> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
>  drivers/clocksource/timer-riscv.c | 79 +++++++++++++++----------------
>  1 file changed, 37 insertions(+), 42 deletions(-)
> 
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> index 1b4b36df5484..4016c065a01c 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -119,61 +119,28 @@ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id)
>  	return IRQ_HANDLED;
>  }
>  
> -static int __init riscv_timer_init_dt(struct device_node *n)
> +static int __init riscv_timer_init_common(void)
>  {
> -	int cpuid, error;
> -	unsigned long hartid;
> -	struct device_node *child;
> -	struct irq_domain *domain;
> -
> -	error = riscv_of_processor_hartid(n, &hartid);
> -	if (error < 0) {
> -		pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n",
> -			n, hartid);
> -		return error;
> -	}
> -
> -	cpuid = riscv_hartid_to_cpuid(hartid);
> -	if (cpuid < 0) {
> -		pr_warn("Invalid cpuid for hartid [%lu]\n", hartid);
> -		return cpuid;
> -	}
> -
> -	if (cpuid != smp_processor_id())
> -		return 0;
> +	int error;
> +	struct fwnode_handle *intc_fwnode = riscv_get_intc_hwnode();
> +	struct irq_domain *domain = NULL;
>  
> -	child = of_find_compatible_node(NULL, NULL, "riscv,timer");
> -	if (child) {
> -		riscv_timer_cannot_wake_cpu = of_property_read_bool(child,
> -					"riscv,timer-cannot-wake-cpu");
> -		of_node_put(child);
> -	}

Uhh, where did this code go?
Unless I've badly missed something, this has vanished in the patch.

>  
> -	domain = NULL;
> -	child = of_get_compatible_child(n, "riscv,cpu-intc");
> -	if (!child) {
> -		pr_err("Failed to find INTC node [%pOF]\n", n);
> -		return -ENODEV;
> -	}
> -	domain = irq_find_host(child);
> -	of_node_put(child);
> +	domain = irq_find_matching_fwnode(intc_fwnode, DOMAIN_BUS_ANY);
>  	if (!domain) {
> -		pr_err("Failed to find IRQ domain for node [%pOF]\n", n);
> +		pr_err("Failed to find INTC node [%pfwP]\n", intc_fwnode);
>  		return -ENODEV;
>  	}
>  
>  	riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER);
>  	if (!riscv_clock_event_irq) {
> -		pr_err("Failed to map timer interrupt for node [%pOF]\n", n);
> -		return -ENODEV;
> +		pr_err("Failed to map timer interrupt for node [%pfwP]\n",
> +			intc_fwnode);
>  	}
>  
> -	pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n",
> -	       __func__, cpuid, hartid);
>  	error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
>  	if (error) {
> -		pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",
> -		       error, cpuid);
> +		pr_err("clocksource register failed [%d]\n", error);

If you're changing this, s/register/registration/ to be grammatically
correct I suppose.

>  		return error;
>  	}
>  
> @@ -199,7 +166,35 @@ static int __init riscv_timer_init_dt(struct device_node *n)
>  		static_branch_enable(&riscv_sstc_available);
>  	}
>  
> +	pr_info("timer registered using %s\n",
> +		(static_branch_likely(&riscv_sstc_available)) ?
> +		"RISC-V Sstc" : "RISC-V SBI");

Why is this needed? Isn't there a print like 3 lines above here that
says "Timer interrupt in S-mode is available via sstc extension"?

> +
>  	return error;
>  }
>  
> +static int __init riscv_timer_init_dt(struct device_node *n)
> +{
> +	int cpuid, error;
> +	unsigned long hartid;
> +
> +	error = riscv_of_processor_hartid(n, &hartid);
> +	if (error < 0) {
> +		pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n",

While you're already moving this, may as well fix the grammar IMO.
s/Not valid/Invalid/

Cheers,
Conor.

> +			n, hartid);
> +		return error;
> +	}
> +
> +	cpuid = riscv_hartid_to_cpuid(hartid);
> +	if (cpuid < 0) {
> +		pr_warn("Invalid cpuid for hartid [%lu]\n", hartid);
> +		return cpuid;
> +	}
> +
> +	if (cpuid != smp_processor_id())
> +		return 0;
> +
> +	return riscv_timer_init_common();
> +}
> +
>  TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);
> -- 
> 2.38.0
>
Sunil V L Feb. 13, 2023, 5:22 p.m. UTC | #2 
Hi Conor,

On Thu, Feb 09, 2023 at 08:54:11PM +0000, Conor Dooley wrote:
> Hey Sunil,
> 
> On Mon, Jan 30, 2023 at 11:52:16PM +0530, Sunil V L wrote:
> > Refactor the timer init function such that few things can be shared by
> > both DT and ACPI based platforms.
> > 
> > Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> 
> What did Anup do here? He's not author or co-author, so the SoB chain
> looks incorrect.
> 
When I wanted to refactor, I realized Anup had done similar in his branch for
a different purpose. So, I took some of his changes and I added SOB. Let me
add him in co-developed-by:

> > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> > ---
> >  drivers/clocksource/timer-riscv.c | 79 +++++++++++++++----------------
> >  1 file changed, 37 insertions(+), 42 deletions(-)
> > 
> > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> > index 1b4b36df5484..4016c065a01c 100644
> > --- a/drivers/clocksource/timer-riscv.c
> > +++ b/drivers/clocksource/timer-riscv.c
> > @@ -119,61 +119,28 @@ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id)
> >  	return IRQ_HANDLED;
> >  }
> >  
> > -static int __init riscv_timer_init_dt(struct device_node *n)
> > +static int __init riscv_timer_init_common(void)
> >  {
> > -	int cpuid, error;
> > -	unsigned long hartid;
> > -	struct device_node *child;
> > -	struct irq_domain *domain;
> > -
> > -	error = riscv_of_processor_hartid(n, &hartid);
> > -	if (error < 0) {
> > -		pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n",
> > -			n, hartid);
> > -		return error;
> > -	}
> > -
> > -	cpuid = riscv_hartid_to_cpuid(hartid);
> > -	if (cpuid < 0) {
> > -		pr_warn("Invalid cpuid for hartid [%lu]\n", hartid);
> > -		return cpuid;
> > -	}
> > -
> > -	if (cpuid != smp_processor_id())
> > -		return 0;
> > +	int error;
> > +	struct fwnode_handle *intc_fwnode = riscv_get_intc_hwnode();
> > +	struct irq_domain *domain = NULL;
> >  
> > -	child = of_find_compatible_node(NULL, NULL, "riscv,timer");
> > -	if (child) {
> > -		riscv_timer_cannot_wake_cpu = of_property_read_bool(child,
> > -					"riscv,timer-cannot-wake-cpu");
> > -		of_node_put(child);
> > -	}
> 
> Uhh, where did this code go?
> Unless I've badly missed something, this has vanished in the patch.
> 
Oops! Anup's patch had moved this to a separate DT timer node instead of
cpu node which I didn't realize. Thanks for catching this. Will fix it.

> >  
> > -	domain = NULL;
> > -	child = of_get_compatible_child(n, "riscv,cpu-intc");
> > -	if (!child) {
> > -		pr_err("Failed to find INTC node [%pOF]\n", n);
> > -		return -ENODEV;
> > -	}
> > -	domain = irq_find_host(child);
> > -	of_node_put(child);
> > +	domain = irq_find_matching_fwnode(intc_fwnode, DOMAIN_BUS_ANY);
> >  	if (!domain) {
> > -		pr_err("Failed to find IRQ domain for node [%pOF]\n", n);
> > +		pr_err("Failed to find INTC node [%pfwP]\n", intc_fwnode);
> >  		return -ENODEV;
> >  	}
> >  
> >  	riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER);
> >  	if (!riscv_clock_event_irq) {
> > -		pr_err("Failed to map timer interrupt for node [%pOF]\n", n);
> > -		return -ENODEV;
> > +		pr_err("Failed to map timer interrupt for node [%pfwP]\n",
> > +			intc_fwnode);
> >  	}
> >  
> > -	pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n",
> > -	       __func__, cpuid, hartid);
> >  	error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
> >  	if (error) {
> > -		pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",
> > -		       error, cpuid);
> > +		pr_err("clocksource register failed [%d]\n", error);
> 
> If you're changing this, s/register/registration/ to be grammatically
> correct I suppose.
> 
Sure.
> >  		return error;
> >  	}
> >  
> > @@ -199,7 +166,35 @@ static int __init riscv_timer_init_dt(struct device_node *n)
> >  		static_branch_enable(&riscv_sstc_available);
> >  	}
> >  
> > +	pr_info("timer registered using %s\n",
> > +		(static_branch_likely(&riscv_sstc_available)) ?
> > +		"RISC-V Sstc" : "RISC-V SBI");
> 
> Why is this needed? Isn't there a print like 3 lines above here that
> says "Timer interrupt in S-mode is available via sstc extension"?
> 
Yes, will remove it.

> > +
> >  	return error;
> >  }
> >  
> > +static int __init riscv_timer_init_dt(struct device_node *n)
> > +{
> > +	int cpuid, error;
> > +	unsigned long hartid;
> > +
> > +	error = riscv_of_processor_hartid(n, &hartid);
> > +	if (error < 0) {
> > +		pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n",
> 
> While you're already moving this, may as well fix the grammar IMO.
> s/Not valid/Invalid/
>
Okay

Thanks!
Sunil
diff mbox series

Patch

diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index 1b4b36df5484..4016c065a01c 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -119,61 +119,28 @@  static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
-static int __init riscv_timer_init_dt(struct device_node *n)
+static int __init riscv_timer_init_common(void)
 {
-	int cpuid, error;
-	unsigned long hartid;
-	struct device_node *child;
-	struct irq_domain *domain;
-
-	error = riscv_of_processor_hartid(n, &hartid);
-	if (error < 0) {
-		pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n",
-			n, hartid);
-		return error;
-	}
-
-	cpuid = riscv_hartid_to_cpuid(hartid);
-	if (cpuid < 0) {
-		pr_warn("Invalid cpuid for hartid [%lu]\n", hartid);
-		return cpuid;
-	}
-
-	if (cpuid != smp_processor_id())
-		return 0;
+	int error;
+	struct fwnode_handle *intc_fwnode = riscv_get_intc_hwnode();
+	struct irq_domain *domain = NULL;
 
-	child = of_find_compatible_node(NULL, NULL, "riscv,timer");
-	if (child) {
-		riscv_timer_cannot_wake_cpu = of_property_read_bool(child,
-					"riscv,timer-cannot-wake-cpu");
-		of_node_put(child);
-	}
 
-	domain = NULL;
-	child = of_get_compatible_child(n, "riscv,cpu-intc");
-	if (!child) {
-		pr_err("Failed to find INTC node [%pOF]\n", n);
-		return -ENODEV;
-	}
-	domain = irq_find_host(child);
-	of_node_put(child);
+	domain = irq_find_matching_fwnode(intc_fwnode, DOMAIN_BUS_ANY);
 	if (!domain) {
-		pr_err("Failed to find IRQ domain for node [%pOF]\n", n);
+		pr_err("Failed to find INTC node [%pfwP]\n", intc_fwnode);
 		return -ENODEV;
 	}
 
 	riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER);
 	if (!riscv_clock_event_irq) {
-		pr_err("Failed to map timer interrupt for node [%pOF]\n", n);
-		return -ENODEV;
+		pr_err("Failed to map timer interrupt for node [%pfwP]\n",
+			intc_fwnode);
 	}
 
-	pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n",
-	       __func__, cpuid, hartid);
 	error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
 	if (error) {
-		pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",
-		       error, cpuid);
+		pr_err("clocksource register failed [%d]\n", error);
 		return error;
 	}
 
@@ -199,7 +166,35 @@  static int __init riscv_timer_init_dt(struct device_node *n)
 		static_branch_enable(&riscv_sstc_available);
 	}
 
+	pr_info("timer registered using %s\n",
+		(static_branch_likely(&riscv_sstc_available)) ?
+		"RISC-V Sstc" : "RISC-V SBI");
+
 	return error;
 }
 
+static int __init riscv_timer_init_dt(struct device_node *n)
+{
+	int cpuid, error;
+	unsigned long hartid;
+
+	error = riscv_of_processor_hartid(n, &hartid);
+	if (error < 0) {
+		pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n",
+			n, hartid);
+		return error;
+	}
+
+	cpuid = riscv_hartid_to_cpuid(hartid);
+	if (cpuid < 0) {
+		pr_warn("Invalid cpuid for hartid [%lu]\n", hartid);
+		return cpuid;
+	}
+
+	if (cpuid != smp_processor_id())
+		return 0;
+
+	return riscv_timer_init_common();
+}
+
 TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);