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[v1,4/4] riscv: dts: starfive: Add dphy rx node

Message ID 20230210061713.6449-5-changhuang.liang@starfivetech.com (mailing list archive)
State Superseded
Delegated to: Conor Dooley
Headers show
Series Add JH7110 MIPI DPHY RX support | expand

Checks

Context Check Description
conchuod/tree_selection fail Failed to apply to next/pending-fixes or riscv/for-next

Commit Message

Changhuang Liang Feb. 10, 2023, 6:17 a.m. UTC 
Add dphy rx node for the Starfive JH7110 SoC. It use to transfer the CSI
cameras data.

Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)
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Patch

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index bce3e407ab60..bdd7b672fd94 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -488,5 +488,18 @@  voutcrg: clock-controller@295C0000 {
 			#reset-cells = <1>;
 			power-domains = <&pwrc JH7110_PD_VOUT>;
 		};
+
+		csi_phy: dphy@19820000 {
+			compatible = "starfive,jh7110-dphy-rx";
+			reg = <0x0 0x19820000 0x0 0x10000>;
+			clocks = <&ispcrg JH7110_ISPCLK_M31DPHY_CFGCLK_IN>,
+				 <&ispcrg JH7110_ISPCLK_M31DPHY_REFCLK_IN>,
+				 <&ispcrg JH7110_ISPCLK_M31DPHY_TXCLKESC_LAN0>;
+			clock-names = "cfg", "ref", "tx";
+			resets = <&ispcrg JH7110_ISPRST_M31DPHY_HW>,
+				 <&ispcrg JH7110_ISPRST_M31DPHY_B09_ALWAYS_ON>;
+			starfive,aon-syscon = <&aon_syscon 0x00>;
+			#phy-cells = <0>;
+		};
 	};
 };