| Message ID | 20230211031821.976408-4-cristian.ciocaltea@collabora.com (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Delegated to: | Conor Dooley |
| Headers | show |
| Series | Enable networking support for StarFive JH7100 SoC | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/tree_selection | fail | Failed to apply to next/pending-fixes or riscv/for-next |
On Sat, Feb 11, 2023 at 05:18:12AM +0200, Cristian Ciocaltea wrote: > From: Emil Renner Berthing <kernel@esmil.dk> > > This adds support for the StarFive JH7100 SoC which also feature this > SiFive cache controller. > > Unfortunately the interrupt for uncorrected data is broken on the JH7100 > and fires continuously, so add a quirk to not register a handler for it. > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > [drop JH7110, rework Kconfig] > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> This driver doesn't really do very much of anything as things stand, so I don't see really see all that much value in picking it up right now, since the non-coherent bits aren't usable yet. > --- > drivers/soc/sifive/Kconfig | 1 + > drivers/soc/sifive/sifive_ccache.c | 11 ++++++++++- > 2 files changed, 11 insertions(+), 1 deletion(-) > > diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig > index e86870be34c9..867cf16273a4 100644 > --- a/drivers/soc/sifive/Kconfig > +++ b/drivers/soc/sifive/Kconfig > @@ -4,6 +4,7 @@ if SOC_SIFIVE || SOC_STARFIVE > > config SIFIVE_CCACHE > bool "Sifive Composable Cache controller" > + default SOC_STARFIVE I don't think this should have a default set w/ the support that this patch brings in. Perhaps later we should be doing defaulting, but not at this point in the series. Other than that, this is fine by me: Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor.
On 3/7/23 01:32, Conor Dooley wrote: > On Sat, Feb 11, 2023 at 05:18:12AM +0200, Cristian Ciocaltea wrote: >> From: Emil Renner Berthing <kernel@esmil.dk> >> >> This adds support for the StarFive JH7100 SoC which also feature this >> SiFive cache controller. >> >> Unfortunately the interrupt for uncorrected data is broken on the JH7100 >> and fires continuously, so add a quirk to not register a handler for it. >> >> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> >> [drop JH7110, rework Kconfig] >> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> > > This driver doesn't really do very much of anything as things stand, so > I don't see really see all that much value in picking it up right now, > since the non-coherent bits aren't usable yet. > >> --- >> drivers/soc/sifive/Kconfig | 1 + >> drivers/soc/sifive/sifive_ccache.c | 11 ++++++++++- >> 2 files changed, 11 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig >> index e86870be34c9..867cf16273a4 100644 >> --- a/drivers/soc/sifive/Kconfig >> +++ b/drivers/soc/sifive/Kconfig >> @@ -4,6 +4,7 @@ if SOC_SIFIVE || SOC_STARFIVE >> >> config SIFIVE_CCACHE >> bool "Sifive Composable Cache controller" >> + default SOC_STARFIVE > > I don't think this should have a default set w/ the support that this > patch brings in. Perhaps later we should be doing defaulting, but not at > this point in the series. I will handle this is v2 as soon as the non-coherency stuff is ready. > Other than that, this is fine by me: > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Thanks for reviewing, Cristian > Thanks, > Conor.
diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig index e86870be34c9..867cf16273a4 100644 --- a/drivers/soc/sifive/Kconfig +++ b/drivers/soc/sifive/Kconfig @@ -4,6 +4,7 @@ if SOC_SIFIVE || SOC_STARFIVE config SIFIVE_CCACHE bool "Sifive Composable Cache controller" + default SOC_STARFIVE help Support for the composable cache controller on SiFive platforms. diff --git a/drivers/soc/sifive/sifive_ccache.c b/drivers/soc/sifive/sifive_ccache.c index 3684f5b40a80..676468c35859 100644 --- a/drivers/soc/sifive/sifive_ccache.c +++ b/drivers/soc/sifive/sifive_ccache.c @@ -106,6 +106,7 @@ static void ccache_config_read(void) static const struct of_device_id sifive_ccache_ids[] = { { .compatible = "sifive,fu540-c000-ccache" }, { .compatible = "sifive,fu740-c000-ccache" }, + { .compatible = "starfive,jh7100-ccache", .data = (void *)BIT(DATA_UNCORR) }, { .compatible = "sifive,ccache0" }, { /* end of table */ } }; @@ -210,11 +211,15 @@ static int __init sifive_ccache_init(void) struct device_node *np; struct resource res; int i, rc, intr_num; + const struct of_device_id *match; + unsigned long broken_irqs; - np = of_find_matching_node(NULL, sifive_ccache_ids); + np = of_find_matching_node_and_match(NULL, sifive_ccache_ids, &match); if (!np) return -ENODEV; + broken_irqs = (uintptr_t)match->data; + if (of_address_to_resource(np, 0, &res)) { rc = -ENODEV; goto err_node_put; @@ -240,6 +245,10 @@ static int __init sifive_ccache_init(void) for (i = 0; i < intr_num; i++) { g_irq[i] = irq_of_parse_and_map(np, i); + + if (broken_irqs & BIT(i)) + continue; + rc = request_irq(g_irq[i], ccache_int_handler, 0, "ccache_ecc", NULL); if (rc) {